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Searched refs:HHI_MPEG_CLK_CNTL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-meson/
Dclock.h45 #define HHI_MPEG_CLK_CNTL 0x174 /* 0x5d offset in data sheet */ macro
/external/u-boot/drivers/clk/
Dclk_meson.c176 reg = readl(priv->addr + HHI_MPEG_CLK_CNTL); in meson_clk81_get_rate()
190 reg = readl(priv->addr + HHI_MPEG_CLK_CNTL); in meson_clk81_get_rate()