Searched refs:HHI_MPLL_CNTL6 (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/drivers/clk/ |
| D | clk_meson.c | 115 MESON_GATE(CLKID_FCLK_DIV3, HHI_MPLL_CNTL6, 28),
116 MESON_GATE(CLKID_FCLK_DIV4, HHI_MPLL_CNTL6, 29),
117 MESON_GATE(CLKID_FCLK_DIV5, HHI_MPLL_CNTL6, 30),
118 MESON_GATE(CLKID_FCLK_DIV7, HHI_MPLL_CNTL6, 31),
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| /external/u-boot/arch/arm/include/asm/arch-meson/ |
| D | clock.h | 79 #define HHI_MPLL_CNTL6 0x294 /* 0xa5 offset in data sheet */ macro
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