Home
last modified time | relevance | path

Searched refs:HPIPE_PWR_PLL_PHY_MODE_OFFSET (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/phy/marvell/
Dcomphy_hpipe.h74 #define HPIPE_PWR_PLL_PHY_MODE_OFFSET 5 macro
76 (0x7 << HPIPE_PWR_PLL_PHY_MODE_OFFSET)
Dcomphy_cp110.c248 data |= 0x3 << HPIPE_PWR_PLL_PHY_MODE_OFFSET; in comphy_pcie_power_up()
582 data |= 0x5 << HPIPE_PWR_PLL_PHY_MODE_OFFSET; in comphy_usb3_power_up()
741 data |= 0x0 << HPIPE_PWR_PLL_PHY_MODE_OFFSET; in comphy_sata_power_up()
1058 data |= 0x4 << HPIPE_PWR_PLL_PHY_MODE_OFFSET; in comphy_sgmii_power_up()
1201 data |= 0x4 << HPIPE_PWR_PLL_PHY_MODE_OFFSET; in comphy_sfi_power_up()
1510 data |= 0x4 << HPIPE_PWR_PLL_PHY_MODE_OFFSET; in comphy_rxauii_power_up()