Searched refs:HasLane (Results 1 – 11 of 11) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | MLxExpansionPass.cpp | 67 bool NegAcc, bool HasLane); 208 bool NegAcc, bool HasLane) { in ExpandFPMLxInstruction() argument 216 unsigned LaneImm = HasLane ? MI->getOperand(4).getImm() : 0; in ExpandFPMLxInstruction() 217 unsigned NextOp = HasLane ? 5 : 4; in ExpandFPMLxInstruction() 228 if (HasLane) in ExpandFPMLxInstruction() 293 bool NegAcc, HasLane; in ExpandFPMLxInstructions() local 295 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions() 299 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
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D | ARMBaseInstrInfo.h | 283 bool &HasLane) const;
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D | ARMBaseInstrInfo.cpp | 59 bool HasLane; // True if instruction has an extra "lane" operand. member 2756 bool &NegAcc, bool &HasLane) const { in isFpMLxInstruction() 2765 HasLane = Entry.HasLane; in isFpMLxInstruction()
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/external/llvm/lib/Target/ARM/ |
D | MLxExpansionPass.cpp | 70 bool NegAcc, bool HasLane); 274 bool NegAcc, bool HasLane) { in ExpandFPMLxInstruction() argument 282 unsigned LaneImm = HasLane ? MI->getOperand(4).getImm() : 0; in ExpandFPMLxInstruction() 283 unsigned NextOp = HasLane ? 5 : 4; in ExpandFPMLxInstruction() 296 if (HasLane) in ExpandFPMLxInstruction() 361 bool NegAcc, HasLane; in ExpandFPMLxInstructions() local 363 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions() 367 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
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D | ARMBaseInstrInfo.h | 384 bool &HasLane) const;
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D | ARMBaseInstrInfo.cpp | 60 bool HasLane; // True if instruction has an extra "lane" operand. member 4151 bool &NegAcc, bool &HasLane) const { in isFpMLxInstruction() 4160 HasLane = Entry.HasLane; in isFpMLxInstruction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | MLxExpansionPass.cpp | 70 bool NegAcc, bool HasLane); 274 bool NegAcc, bool HasLane) { in ExpandFPMLxInstruction() argument 282 unsigned LaneImm = HasLane ? MI->getOperand(4).getImm() : 0; in ExpandFPMLxInstruction() 283 unsigned NextOp = HasLane ? 5 : 4; in ExpandFPMLxInstruction() 296 if (HasLane) in ExpandFPMLxInstruction() 358 bool NegAcc, HasLane; in ExpandFPMLxInstructions() local 360 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions() 364 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
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D | ARMBaseInstrInfo.h | 415 bool &HasLane) const;
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D | ARMBaseInstrInfo.cpp | 84 bool HasLane; // True if instruction has an extra "lane" operand. member 4545 bool &NegAcc, bool &HasLane) const { in isFpMLxInstruction() 4554 HasLane = Entry.HasLane; in isFpMLxInstruction()
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.cpp | 317 bool HasLane; member 701 if (LdStDesc->HasLane) in printInst()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.cpp | 339 bool HasLane; member 723 if (LdStDesc->HasLane) in printInst()
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