| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMTargetStreamer.cpp | 124 if (STI.hasFeature(ARM::HasV8Ops)) { in getArchForCPU()
220 if (STI.hasFeature(ARM::HasV8Ops)) in emitTargetAttributes()
272 if (STI.hasFeature(ARM::FeatureHWDivARM) && !STI.hasFeature(ARM::HasV8Ops)) in emitTargetAttributes()
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| D | ARMMCTargetDesc.cpp | 71 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() && in getITDeprecationInfo()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.h | 95 bool HasV8Ops = false; variable
401 bool hasV8Ops() const { return HasV8Ops; } in hasV8Ops()
|
| D | ARM.td | 296 def HasV8Ops : SubtargetFeature<"v8", "HasV8Ops", "true",
301 [HasV8Ops]>;
436 def ARMv8a : Architecture<"armv8-a", "ARMv8a", [HasV8Ops,
|
| D | ARMInstrThumb.td | 332 []>, T1Encoding<0b101101>, Requires<[IsNotMClass]>, Deprecated<HasV8Ops> {
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| D | ARMInstrInfo.td | 215 AssemblerPredicate<"HasV8Ops", "armv8">;
217 AssemblerPredicate<"!HasV8Ops", "armv7 or earlier">;
2032 "setend\t$end", []>, Requires<[IsARM]>, Deprecated<HasV8Ops> {
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.h | 151 bool HasV8Ops = false; variable
527 bool hasV8Ops() const { return HasV8Ops; } in hasV8Ops()
|
| D | ARM.td | 423 def HasV8Ops : SubtargetFeature<"v8", "HasV8Ops", "true",
429 [HasV8Ops]>;
598 def ARMv8a : Architecture<"armv8-a", "ARMv8a", [HasV8Ops,
662 def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops,
|
| D | ARMInstrThumb.td | 349 … []>, T1Encoding<0b101101>, Requires<[IsThumb, IsNotMClass]>, Deprecated<HasV8Ops> {
|
| D | ARMInstrInfo.td | 247 AssemblerPredicate<"HasV8Ops", "armv8">;
249 AssemblerPredicate<"!HasV8Ops", "armv7 or earlier">;
2139 "setend\t$end", []>, Requires<[IsARM]>, Deprecated<HasV8Ops> {
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCTargetDesc.cpp | 68 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() && in getITDeprecationInfo()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 978 if ((RegNo == 13 && !featureBits[ARM::HasV8Ops]) || RegNo == 15) in DecoderGPRRegisterClass()
1373 if (featureBits[ARM::HasV8Ops] && (coproc != 14)) in DecodeCopMemInstruction()
2175 !FeatureBits[ARM::HasV8Ops]) in DecodeSETPANInstruction()
3976 if (featureBits[ARM::HasV8Ops] && !(Val == 14 || Val == 15)) in DecodeCoprocessor()
5346 if (featureBits[ARM::ModeThumb] && !featureBits[ARM::HasV8Ops]) { in DecodeForVMRSandVMSR()
|
| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 983 if ((RegNo == 13 && !featureBits[ARM::HasV8Ops]) || RegNo == 15) in DecoderGPRRegisterClass()
1374 if (featureBits[ARM::HasV8Ops] && (coproc != 14)) in DecodeCopMemInstruction()
2176 !FeatureBits[ARM::HasV8Ops]) in DecodeSETPANInstruction()
3976 if (featureBits[ARM::HasV8Ops] && !(Val == 14 || Val == 15)) in DecodeCoprocessor()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 693 O << ARM_MB::MemBOptToString(val, STI.getFeatureBits()[ARM::HasV8Ops]); in printMemBOption()
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 681 O << ARM_MB::MemBOptToString(val, STI.getFeatureBits()[ARM::HasV8Ops]); in printMemBOption()
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenDisassemblerTables.inc | 11215 return (!Bits[ARM::ModeThumb] && Bits[ARM::HasV8Ops] && Bits[ARM::FeatureCRC]);
11219 return (!Bits[ARM::ModeThumb] && !Bits[ARM::HasV8Ops]);
11221 return (!Bits[ARM::ModeThumb] && Bits[ARM::HasV8Ops]);
11223 return (!Bits[ARM::ModeThumb] && Bits[ARM::HasV8Ops] && Bits[ARM::HasV8_1aOps]);
11259 return (Bits[ARM::HasV8Ops] && Bits[ARM::FeatureCrypto]);
11277 …return (Bits[ARM::ModeThumb] && Bits[ARM::FeatureThumb2] && Bits[ARM::HasV8Ops] && Bits[ARM::HasV8…
11281 return (Bits[ARM::ModeThumb] && Bits[ARM::HasV8Ops]);
11303 return (Bits[ARM::ModeThumb] && Bits[ARM::FeatureThumb2] && Bits[ARM::HasV8Ops]);
11325 …return (Bits[ARM::ModeThumb] && Bits[ARM::FeatureThumb2] && Bits[ARM::HasV8Ops] && Bits[ARM::Featu…
11327 return (Bits[ARM::ModeThumb] && Bits[ARM::FeatureThumb2] && !Bits[ARM::HasV8Ops]);
[all …]
|
| D | ARMGenAsmWriter.inc | 9389 STI.getFeatureBits()[ARM::HasV8Ops]) {
9474 STI.getFeatureBits()[ARM::HasV8Ops]) {
9562 STI.getFeatureBits()[ARM::HasV8Ops]) {
|
| D | ARMGenSubtargetInfo.inc | 129 HasV8Ops = 113,
219 …{ "armv8-a", "ARMv8a architecture", { ARM::ARMv8a }, { ARM::HasV8Ops, ARM::FeatureAClass, ARM::Fea…
222 …{ "armv8-r", "ARMv8r architecture", { ARM::ARMv8r }, { ARM::HasV8Ops, ARM::FeatureRClass, ARM::Fea…
307 …{ "v8", "Support ARM v8 instructions", { ARM::HasV8Ops }, { ARM::HasV7Ops, ARM::FeatureAcquireRele…
308 { "v8.1a", "Support ARM v8.1a instructions", { ARM::HasV8_1aOps }, { ARM::HasV8Ops } },
16608 if (Bits[ARM::HasV8Ops]) HasV8Ops = true;
|
| D | ARMGenMCCodeEmitter.inc | 11203 if ((FB[ARM::HasV8Ops]))
11205 if ((!FB[ARM::HasV8Ops]))
|
| D | ARMGenAsmMatcher.inc | 7653 if ((FB[ARM::HasV8Ops]))
7655 if ((!FB[ARM::HasV8Ops]))
|
| D | ARMGenInstrInfo.inc | 5452 …::UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo2, ARM::HasV8Ops ,nullptr }, // I…
7890 …::UnmodeledSideEffects), 0xc80ULL, nullptr, nullptr, OperandInfo2, ARM::HasV8Ops ,nullptr }, // I…
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 276 return getSTI().getFeatureBits()[ARM::HasV8Ops]; in hasV8Ops()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 470 return getSTI().getFeatureBits()[ARM::HasV8Ops]; in hasV8Ops()
|