| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVAsmBackend.cpp | 272 unsigned Hi1 = (Value >> 11) & 0x1; in adjustFixupValue() local
279 Value = (Sbit << 31) | (Mid6 << 25) | (Lo4 << 8) | (Hi1 << 7); in adjustFixupValue()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 142 MachineOperand Hi1(getSubOperand64(I.getOperand(1), AMDGPU::sub1)); in selectG_ADD() local
146 .add(Hi1) in selectG_ADD()
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| D | AMDGPUISelDAGToDAG.cpp | 715 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64() local
733 SDValue(Hi1, 0), in SelectADD_SUB_I64()
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| D | SIISelLowering.cpp | 3576 SDValue Lo1, Hi1; in splitBinaryVectorOp() local
3577 std::tie(Lo1, Hi1) = DAG.SplitVectorOperand(Op.getNode(), 1); in splitBinaryVectorOp()
3583 SDValue OpHi = DAG.getNode(Opc, SL, Hi0.getValueType(), Hi0, Hi1, in splitBinaryVectorOp()
5714 SDValue Hi1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, RHS, One); in LowerSELECT() local
5716 SDValue Hi = DAG.getSelect(DL, MVT::i32, Cond, Hi0, Hi1); in LowerSELECT()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 595 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64() local
608 SDValue(Hi0, 0), SDValue(Hi1, 0), Carry); in SelectADD_SUB_I64()
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| D | SIISelLowering.cpp | 2106 SDValue Hi1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, RHS, One); in LowerSELECT() local
2108 SDValue Hi = DAG.getSelect(DL, MVT::i32, Cond, Hi0, Hi1); in LowerSELECT()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1174 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local
1177 GetSplitVector(N->getOperand(1), Lo1, Hi1); in SplitVecOp_VSETCC()
1183 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2)); in SplitVecOp_VSETCC()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1643 SDValue Hi1 = DAG.getNode(MipsISD::ExtractElementF64, dl, MVT::i32, in LowerFCOPYSIGN64() local
1647 SDValue And1 = DAG.getNode(ISD::AND, dl, MVT::i32, Hi1, in LowerFCOPYSIGN64()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 4820 dag Hi1 = (ORI (LIS 0xAAAA), 0xAAAA);
4834 (AND Shift1.Left, MaskValues.Hi1));
4885 dag Hi1 = (i64 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), MaskValues.Hi1, sub_32));
4894 dag Hi1 = (ORI8 (ORIS8 (RLDICR MaskValues64.Hi1, 32, 31), 0xAAAA), 0xAAAA);
4903 (AND8 (RLDICR $A, 1, 62), DWMaskValues.Hi1));
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 2205 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local
2208 GetSplitVector(N->getOperand(1), Lo1, Hi1); in SplitVecOp_VSETCC()
2214 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2)); in SplitVecOp_VSETCC()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1995 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local
1998 GetSplitVector(N->getOperand(1), Lo1, Hi1); in SplitVecOp_VSETCC()
2004 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2)); in SplitVecOp_VSETCC()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4506 ConstantSDNode *Hi1 = dyn_cast<ConstantSDNode>(BVN->getOperand(HiElt+2)); in isExtendedBUILD_VECTOR() local
4507 if (!Lo0 || !Hi0 || !Lo1 || !Hi1) in isExtendedBUILD_VECTOR()
4511 Hi1->getSExtValue() == Lo1->getSExtValue() >> 32) in isExtendedBUILD_VECTOR()
4514 if (Hi0->isNullValue() && Hi1->isNullValue()) in isExtendedBUILD_VECTOR()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6450 ConstantSDNode *Hi1 = dyn_cast<ConstantSDNode>(BVN->getOperand(HiElt+2)); in isExtendedBUILD_VECTOR() local
6451 if (!Lo0 || !Hi0 || !Lo1 || !Hi1) in isExtendedBUILD_VECTOR()
6455 Hi1->getSExtValue() == Lo1->getSExtValue() >> 32) in isExtendedBUILD_VECTOR()
6458 if (Hi0->isNullValue() && Hi1->isNullValue()) in isExtendedBUILD_VECTOR()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 7274 ConstantSDNode *Hi1 = dyn_cast<ConstantSDNode>(BVN->getOperand(HiElt+2)); in isExtendedBUILD_VECTOR() local
7275 if (!Lo0 || !Hi0 || !Lo1 || !Hi1) in isExtendedBUILD_VECTOR()
7279 Hi1->getSExtValue() == Lo1->getSExtValue() >> 32) in isExtendedBUILD_VECTOR()
7282 if (Hi0->isNullValue() && Hi1->isNullValue()) in isExtendedBUILD_VECTOR()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 22907 SDValue Hi1 = extract128BitVector(Op1, NumElems / 2, DAG, dl); in LowerMUL_LOHI() local
22909 SDValue Hi = DAG.getNode(Opcode, dl, DAG.getVTList(HalfVT, HalfVT), Hi0, Hi1); in LowerMUL_LOHI()
|