Searched refs:Hwreg (Results 1 – 14 of 14) sorted by relevance
23 namespace Hwreg { // Symbolic names for the hwreg(...) syntax.
53 namespace Hwreg { namespace
181 namespace Hwreg { // Encoding of SIMM16 used in s_setreg/getreg* insns.
573 def hwreg : NamedOperandU16<"Hwreg", NamedMatchClass<"Hwreg", 0>>;
106 return RegOp->getImm() & AMDGPU::Hwreg::ID_MASK_; in getHWReg()631 return getHWReg(TII, *MI) == AMDGPU::Hwreg::ID_TRAPSTS; in checkRFEHazards()
273 namespace Hwreg { // Encoding of SIMM16 used in s_setreg/getreg* insns.
4095 AMDGPU::Hwreg::OFFSET_SRC_SHARED_BASE : in getSegmentAperture()4096 AMDGPU::Hwreg::OFFSET_SRC_PRIVATE_BASE; in getSegmentAperture()4098 AMDGPU::Hwreg::WIDTH_M1_SRC_SHARED_BASE : in getSegmentAperture()4099 AMDGPU::Hwreg::WIDTH_M1_SRC_PRIVATE_BASE; in getSegmentAperture()4101 AMDGPU::Hwreg::ID_MEM_BASES << AMDGPU::Hwreg::ID_SHIFT_ | in getSegmentAperture()4102 Offset << AMDGPU::Hwreg::OFFSET_SHIFT_ | in getSegmentAperture()4103 WidthM1 << AMDGPU::Hwreg::WIDTH_M1_SHIFT_; in getSegmentAperture()5894 const unsigned Denorm32Reg = AMDGPU::Hwreg::ID_MODE | in LowerFDIV32()5895 (4 << AMDGPU::Hwreg::OFFSET_SHIFT_) | in LowerFDIV32()5896 (1 << AMDGPU::Hwreg::WIDTH_M1_SHIFT_); in LowerFDIV32()
775 def hwreg : NamedOperandU16<"Hwreg", NamedMatchClass<"Hwreg", 0>>;
862 using namespace llvm::AMDGPU::Hwreg; in printHwreg()
1792 using namespace llvm::AMDGPU::Hwreg; in parseHwregConstruct()1854 using namespace llvm::AMDGPU::Hwreg; in parseHwreg()
1194 using namespace llvm::AMDGPU::Hwreg; in printHwreg()
3753 using namespace llvm::AMDGPU::Hwreg; in parseHwregConstruct()3817 using namespace llvm::AMDGPU::Hwreg; in parseHwreg()