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Searched refs:I915_TILING_X (Results 1 – 15 of 15) sorted by relevance

/external/mesa3d/src/intel/isl/
Disl_drm.c41 return I915_TILING_X; in isl_tiling_to_i915_tiling()
64 case I915_TILING_X: in isl_tiling_from_i915_tiling()
/external/minigbm/
Di915.c94 combo->metadata.tiling == I915_TILING_X) { in i915_add_kms_item()
163 metadata.tiling = I915_TILING_X; in i915_add_combinations()
227 case I915_TILING_X: in i915_align_dimensions()
351 bo->tiling = I915_TILING_X; in i915_bo_create_for_modifier()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_regions.c298 case I915_TILING_X: in intel_region_get_tile_masks()
327 case I915_TILING_X: in intel_region_get_aligned_offset()
Dintel_mipmap_tree.c153 return I915_TILING_X; in intel_miptree_choose_tiling()
188 bool y_or_x = tiling == (I915_TILING_Y | I915_TILING_X); in intel_miptree_create()
207 I915_TILING_X, in intel_miptree_create()
Dintel_screen.c446 tiling = I915_TILING_X; in intel_create_image()
1034 uint32_t tiling = I915_TILING_X; in intel_detect_swizzling()
1239 I915_TILING_X, in intelAllocateBuffer()
/external/libdrm/libkms/
Dintel.c123 tile.tiling_mode = I915_TILING_X; in intel_bo_create()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_bufmgr.c174 if (tiling == I915_TILING_X) in bo_tile_pitch()
465 if (tiling == I915_TILING_X) in brw_bo_alloc_tiled_2d()
1194 tiling_mode == I915_TILING_X || in brw_bo_gem_create_from_prime_tiled()
Dintel_screen.c355 [I915_TILING_X] = I915_FORMAT_MOD_X_TILED, in tiling_to_modifier()
1808 uint32_t tiling = I915_TILING_X; in intel_detect_swizzling()
2734 I915_TILING_X, &pitch, in intelAllocateBuffer()
/external/mesa3d/src/intel/vulkan/
Danv_android.c142 case I915_TILING_X: in anv_image_from_gralloc()
Danv_gem.c274 .stride = tiling == I915_TILING_X ? 512 : 128, in anv_gem_get_bit6_swizzle()
Danv_device.c369 bool swizzled = anv_gem_get_bit6_swizzle(fd, I915_TILING_X); in anv_physical_device_init()
/external/mesa3d/include/drm-uapi/
Di915_drm.h1128 #define I915_TILING_X 1 macro
/external/libdrm/include/drm/
Di915_drm.h1170 #define I915_TILING_X 1 macro
/external/kernel-headers/original/uapi/drm/
Di915_drm.h1200 #define I915_TILING_X 1 macro
/external/libdrm/intel/
Dintel_bufmgr_gem.c369 if (*tiling_mode == I915_TILING_X in drm_intel_gem_bo_tile_pitch()
906 else if (tiling == I915_TILING_X in drm_intel_gem_bo_alloc_tiled()