Searched refs:ICC_BPR1_EL1 (Results 1 – 6 of 6) sorted by relevance
| /external/u-boot/arch/arm/include/asm/ |
| D | gic.h | 93 #define ICC_BPR1_EL1 S3_0_C12_C12_3 macro
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 21 # CHECK: mrs x24, {{icc_bpr1_el1|ICC_BPR1_EL1}}
129 # CHECK: msr {{icc_bpr1_el1|ICC_BPR1_EL1}}, x7
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 21 # CHECK: mrs x24, {{icc_bpr1_el1|ICC_BPR1_EL1}}
129 # CHECK: msr {{icc_bpr1_el1|ICC_BPR1_EL1}}, x7
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 690 ICC_BPR1_EL1 = 50787,
2517 { "ICC_BPR1_EL1", 0xC663, true, true, {} }, // 535
2971 { "ICC_BPR1_EL1", 535 },
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 885 def : RWSysReg<"ICC_BPR1_EL1", 0b11, 0b000, 0b1100, 0b1100, 0b011>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1055 def : RWSysReg<"ICC_BPR1_EL1", 0b11, 0b000, 0b1100, 0b1100, 0b011>;
|