Searched refs:ICC_HPPIR0_EL1 (Results 1 – 6 of 6) sorted by relevance
| /external/u-boot/arch/arm/include/asm/ |
| D | gic.h | 90 #define ICC_HPPIR0_EL1 S3_0_C12_C8_2 macro
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 11 # CHECK: mrs x17, {{icc_hppir0_el1|ICC_HPPIR0_EL1}}
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 11 # CHECK: mrs x17, {{icc_hppir0_el1|ICC_HPPIR0_EL1}}
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 246 ICC_HPPIR0_EL1 = 50754,
2073 { "ICC_HPPIR0_EL1", 0xC642, true, false, {} }, // 91
2977 { "ICC_HPPIR0_EL1", 91 },
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 409 def : ROSysReg<"ICC_HPPIR0_EL1", 0b11, 0b000, 0b1100, 0b1000, 0b010>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 573 def : ROSysReg<"ICC_HPPIR0_EL1", 0b11, 0b000, 0b1100, 0b1000, 0b010>;
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