Searched refs:ICC_IAR0_EL1 (Results 1 – 6 of 6) sorted by relevance
| /external/u-boot/arch/arm/include/asm/ |
| D | gic.h | 86 #define ICC_IAR0_EL1 S3_0_C12_C8_0 macro
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 7 # CHECK: mrs x26, {{icc_iar0_el1|ICC_IAR0_EL1}}
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 7 # CHECK: mrs x26, {{icc_iar0_el1|ICC_IAR0_EL1}}
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 244 ICC_IAR0_EL1 = 50752,
2071 { "ICC_IAR0_EL1", 0xC640, true, false, {} }, // 89
2979 { "ICC_IAR0_EL1", 89 },
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 407 def : ROSysReg<"ICC_IAR0_EL1", 0b11, 0b000, 0b1100, 0b1000, 0b000>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 571 def : ROSysReg<"ICC_IAR0_EL1", 0b11, 0b000, 0b1100, 0b1000, 0b000>;
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