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Searched refs:IP2_27_24 (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/drivers/pinctrl/renesas/
Dpfc-r8a77970.c86 #define GPSR1_0 F_(IRQ0, IP2_27_24)
175 #define IP2_27_24 FM(IRQ0) FM(CC5_OSCOUT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro
265 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
473 PINMUX_IPSR_GPSR(IP2_27_24, IRQ0),
474 PINMUX_IPSR_GPSR(IP2_27_24, CC5_OSCOUT),
2281 IP2_27_24
Dpfc-r8a77995.c64 #define GPSR1_15 F_(DU_DG7, IP2_27_24)
223 #define IP2_27_24 FM(DU_DG7) FM(LCDOUT15) FM(SCK4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, … macro
357 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
611 PINMUX_IPSR_GPSR(IP2_27_24, DU_DG7),
612 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT15),
613 PINMUX_IPSR_MSEL(IP2_27_24, SCK4_B, SEL_SCIF4_1),
2283 IP2_27_24
Dpfc-r8a77990.c88 #define GPSR2_25 F_(EX_WAIT0, IP2_27_24)
211 #define IP2_27_24 FM(EX_WAIT0) FM(SDA7_A) FM(AVB_AVTP_CAPTURE_A) FM(VI4_HSYNC_N) FM(RX5_B) FM(P… macro
367 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
617 PINMUX_IPSR_GPSR(IP2_27_24, EX_WAIT0),
618 PINMUX_IPSR_MSEL(IP2_27_24, SDA7_A, SEL_I2C7_0),
619 PINMUX_IPSR_GPSR(IP2_27_24, AVB_AVTP_CAPTURE_A),
620 PINMUX_IPSR_GPSR(IP2_27_24, VI4_HSYNC_N),
621 PINMUX_IPSR_MSEL(IP2_27_24, RX5_B, SEL_SCIF5_1),
622 PINMUX_IPSR_MSEL(IP2_27_24, PWM6_A, SEL_PWM6_0),
4953 IP2_27_24
Dpfc-r8a7796.c84 #define GPSR1_7 F_(A7, IP2_27_24)
240 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) … macro
415 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
742 PINMUX_IPSR_GPSR(IP2_27_24, A7),
743 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
744 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
745 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
746 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
747 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA15),
748 PINMUX_IPSR_GPSR(IP2_27_24, DU_DB7),
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Dpfc-r8a7795.c78 #define GPSR1_7 F_(A7, IP2_27_24)
236 #define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) … macro
409 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
740 PINMUX_IPSR_GPSR(IP2_27_24, A7),
741 PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23),
742 PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0),
743 PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1),
744 PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15),
745 PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA15),
746 PINMUX_IPSR_GPSR(IP2_27_24, DU_DB7),
[all …]