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Searched refs:IP4_27_24 (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/drivers/pinctrl/renesas/
Dpfc-r8a77970.c90 #define GPSR2_15 F_(VI0_DATA11, IP4_27_24)
191 #define IP4_27_24 FM(VI0_DATA11) FM(HTX2) FM(PWM3_A) FM(A25) FM(FSO_TOE_N_B) F_(0, 0) F_(0, 0)… macro
274 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
547 PINMUX_IPSR_GPSR(IP4_27_24, VI0_DATA11),
548 PINMUX_IPSR_GPSR(IP4_27_24, HTX2),
549 PINMUX_IPSR_MSEL(IP4_27_24, PWM3_A, SEL_PWM3_0),
550 PINMUX_IPSR_MSEL(IP4_27_24, FSO_TOE_N_B, SEL_RFSO_1),
2301 IP4_27_24
Dpfc-r8a77990.c70 #define GPSR1_15 F_(A15, IP4_27_24)
229 #define IP4_27_24 FM(A15) FM(MSIOF1_SS2) FM(MSIOF2_TXD_B) FM(VI4_DATA18) FM(VI5_DATA4_A) FM(DU… macro
376 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
750 PINMUX_IPSR_GPSR(IP4_27_24, A15),
751 PINMUX_IPSR_GPSR(IP4_27_24, MSIOF1_SS2),
752 PINMUX_IPSR_GPSR(IP4_27_24, MSIOF2_TXD_B),
753 PINMUX_IPSR_GPSR(IP4_27_24, VI4_DATA18),
754 PINMUX_IPSR_MSEL(IP4_27_24, VI5_DATA4_A, SEL_VIN5_0),
755 PINMUX_IPSR_GPSR(IP4_27_24, DU_DB4),
756 PINMUX_IPSR_GPSR(IP4_27_24, LCDOUT4),
[all …]
Dpfc-r8a77995.c48 #define GPSR1_31 F_(QPOLB, IP4_27_24)
241 #define IP4_27_24 FM(QPOLB) F_(0, 0) FM(TX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(… macro
366 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
676 PINMUX_IPSR_GPSR(IP4_27_24, QPOLB),
677 PINMUX_IPSR_MSEL(IP4_27_24, TX3_B, SEL_SCIF3_1),
2303 IP4_27_24
Dpfc-r8a7796.c68 #define GPSR1_23 F_(RD_N, IP4_27_24)
258 #define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_… macro
424 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
844 PINMUX_IPSR_GPSR(IP4_27_24, RD_N),
845 PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3),
846 PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0),
847 PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0),
848 PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0),
849 PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0),
5341 IP4_27_24
Dpfc-r8a7795.c62 #define GPSR1_23 F_(RD_N, IP4_27_24)
252 #define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_… macro
418 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
842 PINMUX_IPSR_GPSR(IP4_27_24, RD_N),
843 PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3),
844 PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0),
845 PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0),
846 PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0),
847 PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0),
5397 IP4_27_24