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Searched refs:IP5_27_24 (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/drivers/pinctrl/renesas/
Dpfc-r8a77970.c118 #define GPSR3_6 F_(VI1_DATA2, IP5_27_24)
199 #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_D0) F_(0, 0) F_(0, 0) F… macro
274 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
584 PINMUX_IPSR_GPSR(IP5_27_24, VI1_DATA2),
585 PINMUX_IPSR_MSEL(IP5_27_24, CANFD0_TX_B, SEL_CANFD0_1),
586 PINMUX_IPSR_GPSR(IP5_27_24, D5),
587 PINMUX_IPSR_GPSR(IP5_27_24, MMC_D0),
2311 IP5_27_24
Dpfc-r8a77990.c59 #define GPSR0_1 F_(D1, IP5_27_24)
237 #define IP5_27_24 FM(D1) FM(MSIOF3_SYNC_A) FM(SCK3_A) FM(VI4_DATA23) FM(VI5_CLKENB_A) FM(DU_DB7… macro
376 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
808 PINMUX_IPSR_GPSR(IP5_27_24, D1),
809 PINMUX_IPSR_MSEL(IP5_27_24, MSIOF3_SYNC_A, SEL_MSIOF3_0),
810 PINMUX_IPSR_MSEL(IP5_27_24, SCK3_A, SEL_SCIF3_0),
811 PINMUX_IPSR_GPSR(IP5_27_24, VI4_DATA23),
812 PINMUX_IPSR_MSEL(IP5_27_24, VI5_CLKENB_A, SEL_VIN5_0),
813 PINMUX_IPSR_GPSR(IP5_27_24, DU_DB7),
814 PINMUX_IPSR_MSEL(IP5_27_24, RTS4_N_TANS_C, SEL_SCIF4_2),
[all …]
Dpfc-r8a77995.c104 #define GPSR2_9 F_(VI4_DATA8, IP5_27_24)
249 #define IP5_27_24 FM(VI4_DATA8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) … macro
366 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
701 PINMUX_IPSR_GPSR(IP5_27_24, VI4_DATA8),
2313 IP5_27_24
Dpfc-r8a7796.c57 #define GPSR0_3 F_(D3, IP5_27_24)
266 #define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, … macro
424 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
898 PINMUX_IPSR_GPSR(IP5_27_24, D3),
899 PINMUX_IPSR_MSEL(IP5_27_24, MSIOF3_TXD_A, SEL_MSIOF3_0),
900 PINMUX_IPSR_GPSR(IP5_27_24, VI4_DATA19),
901 PINMUX_IPSR_GPSR(IP5_27_24, VI5_DATA3),
5351 IP5_27_24
Dpfc-r8a7795.c51 #define GPSR0_3 F_(D3, IP5_27_24)
260 #define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, … macro
418 FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \
896 PINMUX_IPSR_GPSR(IP5_27_24, D3),
897 PINMUX_IPSR_MSEL(IP5_27_24, MSIOF3_TXD_A, SEL_MSIOF3_0),
898 PINMUX_IPSR_GPSR(IP5_27_24, VI4_DATA19),
899 PINMUX_IPSR_GPSR(IP5_27_24, VI5_DATA3),
5407 IP5_27_24