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Searched refs:IP5_31_28 (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/drivers/pinctrl/renesas/
Dpfc-r8a77970.c117 #define GPSR3_7 F_(VI1_DATA3, IP5_31_28)
200 #define IP5_31_28 FM(VI1_DATA3) FM(CANFD0_RX_B) F_(0, 0) FM(D6) FM(MMC_D1) F_(0, 0) F_(0, 0) F… macro
275 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
589 PINMUX_IPSR_GPSR(IP5_31_28, VI1_DATA3),
590 PINMUX_IPSR_MSEL(IP5_31_28, CANFD0_RX_B, SEL_CANFD0_1),
591 PINMUX_IPSR_GPSR(IP5_31_28, D6),
592 PINMUX_IPSR_GPSR(IP5_31_28, MMC_D1),
2310 IP5_31_28
Dpfc-r8a77995.c103 #define GPSR2_10 F_(VI4_DATA9, IP5_31_28)
250 #define IP5_31_28 FM(VI4_DATA9) FM(MSIOF3_SS2_A) FM(IRQ1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) … macro
367 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
703 PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA9),
704 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF3_SS2_A, SEL_MSIOF3_0),
705 PINMUX_IPSR_MSEL(IP5_31_28, IRQ1_B, SEL_IRQ_1_1),
2312 IP5_31_28
Dpfc-r8a77990.c58 #define GPSR0_2 F_(D2, IP5_31_28)
238 #define IP5_31_28 FM(D2) FM(MSIOF3_RXD_A) FM(RX5_C) F_(0, 0) FM(VI5_DATA14_A) FM(DU_DR3) FM(RX4… macro
377 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
817 PINMUX_IPSR_GPSR(IP5_31_28, D2),
818 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF3_RXD_A, SEL_MSIOF3_0),
819 PINMUX_IPSR_MSEL(IP5_31_28, RX5_C, SEL_SCIF5_2),
820 PINMUX_IPSR_MSEL(IP5_31_28, VI5_DATA14_A, SEL_VIN5_0),
821 PINMUX_IPSR_GPSR(IP5_31_28, DU_DR3),
822 PINMUX_IPSR_MSEL(IP5_31_28, RX4_C, SEL_SCIF4_2),
823 PINMUX_IPSR_GPSR(IP5_31_28, LCDOUT19),
[all …]
Dpfc-r8a7796.c56 #define GPSR0_4 F_(D4, IP5_31_28)
267 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, … macro
425 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
903 PINMUX_IPSR_GPSR(IP5_31_28, D4),
904 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF2_SCK_B, SEL_MSIOF2_1),
905 PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA20),
906 PINMUX_IPSR_GPSR(IP5_31_28, VI5_DATA4),
5350 IP5_31_28
Dpfc-r8a7795.c50 #define GPSR0_4 F_(D4, IP5_31_28)
261 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, … macro
419 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
901 PINMUX_IPSR_GPSR(IP5_31_28, D4),
902 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF2_SCK_B, SEL_MSIOF2_1),
903 PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA20),
904 PINMUX_IPSR_GPSR(IP5_31_28, VI5_DATA4),
5406 IP5_31_28