Searched refs:IP6_3_0 (Results 1 – 5 of 5) sorted by relevance
/external/u-boot/drivers/pinctrl/renesas/ |
D | pfc-r8a77970.c | 116 #define GPSR3_8 F_(VI1_DATA4, IP6_3_0) 201 #define IP6_3_0 FM(VI1_DATA4) FM(CANFD_CLK_B) F_(0, 0) FM(D7) FM(MMC_D2) F_(0, 0) F_(0, 0) F_… macro 268 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \ 595 PINMUX_IPSR_GPSR(IP6_3_0, VI1_DATA4), 596 PINMUX_IPSR_MSEL(IP6_3_0, CANFD_CLK_B, SEL_CANFD0_1), 597 PINMUX_IPSR_GPSR(IP6_3_0, D7), 598 PINMUX_IPSR_GPSR(IP6_3_0, MMC_D2), 2327 IP6_3_0 }
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D | pfc-r8a77990.c | 57 #define GPSR0_3 F_(D3, IP6_3_0) 239 #define IP6_3_0 FM(D3) FM(MSIOF3_TXD_A) FM(TX5_C) F_(0, 0) FM(VI5_DATA15_A) FM(DU_DR4) FM(TX4_… macro 370 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \ 826 PINMUX_IPSR_GPSR(IP6_3_0, D3), 827 PINMUX_IPSR_GPSR(IP6_3_0, MSIOF3_TXD_A), 828 PINMUX_IPSR_GPSR(IP6_3_0, TX5_C), 829 PINMUX_IPSR_MSEL(IP6_3_0, VI5_DATA15_A, SEL_VIN5_0), 830 PINMUX_IPSR_GPSR(IP6_3_0, DU_DR4), 831 PINMUX_IPSR_GPSR(IP6_3_0, TX4_C), 832 PINMUX_IPSR_GPSR(IP6_3_0, LCDOUT20), [all …]
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D | pfc-r8a77995.c | 102 #define GPSR2_11 F_(VI4_DATA10, IP6_3_0) 251 #define IP6_3_0 FM(VI4_DATA10) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro 360 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \ 708 PINMUX_IPSR_GPSR(IP6_3_0, VI4_DATA10), 709 PINMUX_IPSR_MSEL(IP6_3_0, RX4_A, SEL_SCIF4_0), 2329 IP6_3_0 }
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D | pfc-r8a7796.c | 55 #define GPSR0_5 F_(D5, IP6_3_0) 268 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, … macro 418 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \ 909 PINMUX_IPSR_GPSR(IP6_3_0, D5), 910 PINMUX_IPSR_MSEL(IP6_3_0, MSIOF2_SYNC_B, SEL_MSIOF2_1), 911 PINMUX_IPSR_GPSR(IP6_3_0, VI4_DATA21), 912 PINMUX_IPSR_GPSR(IP6_3_0, VI5_DATA5), 5367 IP6_3_0 }
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D | pfc-r8a7795.c | 49 #define GPSR0_5 F_(D5, IP6_3_0) 262 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, … macro 412 FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \ 907 PINMUX_IPSR_GPSR(IP6_3_0, D5), 908 PINMUX_IPSR_MSEL(IP6_3_0, MSIOF2_SYNC_B, SEL_MSIOF2_1), 909 PINMUX_IPSR_GPSR(IP6_3_0, VI4_DATA21), 910 PINMUX_IPSR_GPSR(IP6_3_0, VI5_DATA5), 5423 IP6_3_0 }
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