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Searched refs:ImplicitSReg (Results 1 – 2 of 2) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp4249 unsigned Lane, unsigned &ImplicitSReg) { in getImplicitSPRUseForDPRUse() argument
4253 ImplicitSReg = 0; in getImplicitSPRUseForDPRUse()
4258 ImplicitSReg = TRI->getSubReg(DReg, in getImplicitSPRUseForDPRUse()
4261 MI.getParent()->computeRegisterLiveness(TRI, ImplicitSReg, MI); in getImplicitSPRUseForDPRUse()
4270 ImplicitSReg = 0; in getImplicitSPRUseForDPRUse()
4343 unsigned ImplicitSReg; in setExecutionDomain() local
4344 if (!getImplicitSPRUseForDPRUse(TRI, MI, DReg, Lane, ImplicitSReg)) in setExecutionDomain()
4362 if (ImplicitSReg != 0) in setExecutionDomain()
4363 MIB.addReg(ImplicitSReg, RegState::Implicit); in setExecutionDomain()
4378 unsigned ImplicitSReg; in setExecutionDomain() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp4644 unsigned Lane, unsigned &ImplicitSReg) { in getImplicitSPRUseForDPRUse() argument
4648 ImplicitSReg = 0; in getImplicitSPRUseForDPRUse()
4653 ImplicitSReg = TRI->getSubReg(DReg, in getImplicitSPRUseForDPRUse()
4656 MI.getParent()->computeRegisterLiveness(TRI, ImplicitSReg, MI); in getImplicitSPRUseForDPRUse()
4665 ImplicitSReg = 0; in getImplicitSPRUseForDPRUse()
4741 unsigned ImplicitSReg; in setExecutionDomain() local
4742 if (!getImplicitSPRUseForDPRUse(TRI, MI, DReg, Lane, ImplicitSReg)) in setExecutionDomain()
4760 if (ImplicitSReg != 0) in setExecutionDomain()
4761 MIB.addReg(ImplicitSReg, RegState::Implicit); in setExecutionDomain()
4776 unsigned ImplicitSReg; in setExecutionDomain() local
[all …]