Searched refs:InRegSize (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1321 SDValue InRegSize in LowerDIVREM24() local
1323 Div = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Div, InRegSize); in LowerDIVREM24()
1324 Rem = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Rem, InRegSize); in LowerDIVREM24()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1539 SDValue InRegSize in LowerDIVREM24() local
1541 Div = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Div, InRegSize); in LowerDIVREM24()
1542 Rem = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Rem, InRegSize); in LowerDIVREM24()
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