| /external/libchrome/ipc/ |
| D | ipc_message_templates_impl.h | 25 template <typename Meta, typename... Ins>
26 MessageT<Meta, std::tuple<Ins...>, void>::MessageT(Routing routing, in MessageT()
27 const Ins&... ins) in MessageT()
32 template <typename Meta, typename... Ins>
33 bool MessageT<Meta, std::tuple<Ins...>, void>::Read(const Message* msg, in Read()
39 template <typename Meta, typename... Ins>
40 void MessageT<Meta, std::tuple<Ins...>, void>::Log(std::string* name, in Log()
52 template <typename Meta, typename... Ins, typename... Outs>
53 MessageT<Meta, std::tuple<Ins...>, std::tuple<Outs...>>::MessageT( in MessageT()
55 const Ins&... ins, in MessageT()
[all …]
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| D | ipc_message_templates.h | 113 template <typename Meta, typename... Ins>
114 class MessageT<Meta, std::tuple<Ins...>, void> : public Message {
116 using Param = std::tuple<Ins...>;
124 MessageT(const Ins&... ins) : MessageT(Routing(MSG_ROUTING_CONTROL), ins...) { in MessageT()
129 MessageT(int32_t routing_id, const Ins&... ins) in MessageT()
153 MessageT(Routing routing, const Ins&... ins);
157 template <typename Meta, typename... Ins, typename... Outs>
158 class MessageT<Meta, std::tuple<Ins...>, std::tuple<Outs...>>
161 using SendParam = std::tuple<Ins...>;
170 MessageT(const Ins&... ins, Outs*... outs) in MessageT()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | StraightLineStrengthReduce.cpp | 93 Stride(nullptr), Ins(nullptr), Basis(nullptr) {} in Candidate()
96 : CandidateKind(CT), Base(B), Index(Idx), Stride(S), Ins(I), in Candidate()
119 Instruction *Ins; member
226 return (Basis.Ins != C.Ins && // skip the same instruction in isBasisFor()
229 Basis.Ins->getType() == C.Ins->getType() && in isBasisFor()
231 DT->dominates(Basis.Ins->getParent(), C.Ins->getParent()) && in isBasisFor()
261 return isGEPFoldable(cast<GetElementPtrInst>(C.Ins), TTI); in isFoldable()
288 hasOnlyOneNonZeroIndex(cast<GetElementPtrInst>(C.Ins))); in isSimplestForm()
551 cast<GetElementPtrInst>(Basis.Ins)->getResultElementType())); in emitBump()
571 IntegerType::get(Basis.Ins->getContext(), IndexOffset.getBitWidth()); in emitBump()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsCCState.h | 33 void PreAnalyzeCallResultForF128(const SmallVectorImpl<ISD::InputArg> &Ins,
50 PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
53 PreAnalyzeCallResultForVectorFloat(const SmallVectorImpl<ISD::InputArg> &Ins,
57 const SmallVectorImpl<ISD::InputArg> &Ins);
111 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
113 PreAnalyzeFormalArgumentsForF128(Ins); in AnalyzeFormalArguments()
114 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
120 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() argument
123 PreAnalyzeCallResultForF128(Ins, RetTy, Func); in AnalyzeCallResult()
124 PreAnalyzeCallResultForVectorFloat(Ins, RetTy); in AnalyzeCallResult()
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| D | MipsCCState.cpp | 88 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128() argument
90 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeCallResultForF128()
113 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat() argument
114 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeCallResultForVectorFloat()
149 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128() argument
151 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeFormalArgumentsForF128()
157 if (Ins[i].Flags.isSRet()) { in PreAnalyzeFormalArgumentsForF128()
164 assert(Ins[i].getOrigArgIndex() < MF.getFunction().arg_size()); in PreAnalyzeFormalArgumentsForF128()
165 std::advance(FuncArg, Ins[i].getOrigArgIndex()); in PreAnalyzeFormalArgumentsForF128()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| D | StraightLineStrengthReduce.cpp | 113 : CandidateKind(CT), Base(B), Index(Idx), Stride(S), Ins(I) {} in Candidate()
140 Instruction *Ins = nullptr; member
262 return (Basis.Ins != C.Ins && // skip the same instruction in isBasisFor()
265 Basis.Ins->getType() == C.Ins->getType() && in isBasisFor()
267 DT->dominates(Basis.Ins->getParent(), C.Ins->getParent()) && in isBasisFor()
297 return isGEPFoldable(cast<GetElementPtrInst>(C.Ins), TTI); in isFoldable()
324 hasOnlyOneNonZeroIndex(cast<GetElementPtrInst>(C.Ins))); in isSimplestForm()
585 cast<GetElementPtrInst>(Basis.Ins)->getResultElementType())); in emitBump()
605 IntegerType::get(Basis.Ins->getContext(), IndexOffset.getBitWidth()); in emitBump()
628 assert(Basis.Ins->getParent() != nullptr && "the basis is unlinked"); in rewriteCandidateWithBasis()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsCCState.h | 33 void PreAnalyzeCallResultForF128(const SmallVectorImpl<ISD::InputArg> &Ins,
50 PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
93 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
95 PreAnalyzeFormalArgumentsForF128(Ins); in AnalyzeFormalArguments()
96 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
101 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() argument
104 PreAnalyzeCallResultForF128(Ins, CLI); in AnalyzeCallResult()
105 CCState::AnalyzeCallResult(Ins, Fn); in AnalyzeCallResult()
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| D | MipsCCState.cpp | 75 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128() argument
77 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeCallResultForF128()
115 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128() argument
117 for (unsigned i = 0; i < Ins.size(); ++i) { in PreAnalyzeFormalArgumentsForF128()
123 if (Ins[i].Flags.isSRet()) { in PreAnalyzeFormalArgumentsForF128()
129 assert(Ins[i].getOrigArgIndex() < MF.getFunction()->arg_size()); in PreAnalyzeFormalArgumentsForF128()
130 std::advance(FuncArg, Ins[i].getOrigArgIndex()); in PreAnalyzeFormalArgumentsForF128()
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXISelLowering.cpp | 194 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerFormalArguments() argument
222 for (unsigned i = 0, e = Ins.size(); i != e; ++i) { in LowerFormalArguments()
223 assert((!MFI->isKernel() || Ins[i].VT != MVT::i1) && in LowerFormalArguments()
226 unsigned ParamSize = Ins[i].VT.getStoreSizeInBits(); in LowerFormalArguments()
231 SDValue ArgValue = DAG.getNode(PTXISD::LOAD_PARAM, dl, Ins[i].VT, Chain, in LowerFormalArguments()
237 for (unsigned i = 0, e = Ins.size(); i != e; ++i) { in LowerFormalArguments()
238 EVT RegVT = Ins[i].VT; in LowerFormalArguments()
350 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerCall() argument
363 Ops.resize(Outs.size() + Ins.size() + 4); in LowerCall()
372 Ops[Ins.size()+2] = Callee; in LowerCall()
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| /external/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 70 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
72 unsigned NumArgs = Ins.size(); in AnalyzeFormalArguments()
75 MVT ArgVT = Ins[i].VT; in AnalyzeFormalArguments()
76 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments()
157 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() argument
159 for (unsigned i = 0, e = Ins.size(); i != e; ++i) { in AnalyzeCallResult()
160 MVT VT = Ins[i].VT; in AnalyzeCallResult()
161 ISD::ArgFlagsTy Flags = Ins[i].Flags; in AnalyzeCallResult()
256 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible() argument
262 CCInfo1.AnalyzeCallResult(Ins, CalleeFn); in resultsCompatible()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | CallingConvLower.cpp | 69 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
71 unsigned NumArgs = Ins.size(); in AnalyzeFormalArguments()
74 MVT ArgVT = Ins[i].VT; in AnalyzeFormalArguments()
75 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments()
157 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() argument
159 for (unsigned i = 0, e = Ins.size(); i != e; ++i) { in AnalyzeCallResult()
160 MVT VT = Ins[i].VT; in AnalyzeCallResult()
161 ISD::ArgFlagsTy Flags = Ins[i].Flags; in AnalyzeCallResult()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 87 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
89 unsigned NumArgs = Ins.size(); in AnalyzeFormalArguments()
92 MVT ArgVT = Ins[i].VT; in AnalyzeFormalArguments()
93 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments()
174 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult() argument
176 for (unsigned i = 0, e = Ins.size(); i != e; ++i) { in AnalyzeCallResult()
177 MVT VT = Ins[i].VT; in AnalyzeCallResult()
178 ISD::ArgFlagsTy Flags = Ins[i].Flags; in AnalyzeCallResult()
273 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible() argument
279 CCInfo1.AnalyzeCallResult(Ins, CalleeFn); in resultsCompatible()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZCallingConv.h | 45 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
49 for (unsigned i = 0; i < Ins.size(); ++i) in AnalyzeFormalArguments()
53 for (unsigned i = 0; i < Ins.size(); ++i) in AnalyzeFormalArguments()
54 ArgIsShortVector.push_back(IsShortVectorType(Ins[i].ArgVT)); in AnalyzeFormalArguments()
56 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZCallingConv.h | 45 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments() argument
49 for (unsigned i = 0; i < Ins.size(); ++i) in AnalyzeFormalArguments()
53 for (unsigned i = 0; i < Ins.size(); ++i) in AnalyzeFormalArguments()
54 ArgIsShortVector.push_back(IsShortVectorType(Ins[i].ArgVT)); in AnalyzeFormalArguments()
56 CCState::AnalyzeFormalArguments(Ins, Fn); in AnalyzeFormalArguments()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 375 const SmallVectorImpl<ISD::InputArg> &Ins,
418 const SmallVectorImpl<ISD::InputArg> &Ins,
429 const SmallVectorImpl<ISD::InputArg> &Ins,
435 const SmallVectorImpl<ISD::InputArg> &Ins,
444 const SmallVectorImpl<ISD::InputArg> &Ins,
464 const SmallVectorImpl<ISD::InputArg> &Ins,
470 const SmallVectorImpl<ISD::InputArg> &Ins,
479 const SmallVectorImpl<ISD::InputArg> &Ins,
487 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 99 const SmallVectorImpl<ISD::InputArg> &Ins,
106 const SmallVectorImpl<ISD::InputArg> &Ins,
113 const SmallVectorImpl<ISD::InputArg> &Ins,
120 const SmallVectorImpl<ISD::InputArg> &Ins,
128 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 130 const SmallVectorImpl<ISD::InputArg> &Ins,
137 const SmallVectorImpl<ISD::InputArg> &Ins,
144 const SmallVectorImpl<ISD::InputArg> &Ins,
151 const SmallVectorImpl<ISD::InputArg> &Ins,
159 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreISelLowering.h | 114 const SmallVectorImpl<ISD::InputArg> &Ins,
122 const SmallVectorImpl<ISD::InputArg> &Ins,
127 const SmallVectorImpl<ISD::InputArg> &Ins,
173 const SmallVectorImpl<ISD::InputArg> &Ins,
183 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.h | 114 const SmallVectorImpl<ISD::InputArg> &Ins,
120 const SmallVectorImpl<ISD::InputArg> &Ins,
126 const SmallVectorImpl<ISD::InputArg> &Ins,
135 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.h | 119 const SmallVectorImpl<ISD::InputArg> &Ins,
125 const SmallVectorImpl<ISD::InputArg> &Ins,
131 const SmallVectorImpl<ISD::InputArg> &Ins,
140 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 780 const SmallVectorImpl<ISD::InputArg> &Ins,
790 const SmallVectorImpl<ISD::InputArg> &Ins,
838 const SmallVectorImpl<ISD::InputArg> &Ins,
847 const SmallVectorImpl<ISD::InputArg> &Ins,
853 const SmallVectorImpl<ISD::InputArg> &Ins,
878 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
882 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
886 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
899 const SmallVectorImpl<ISD::InputArg> &Ins,
908 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 136 const SmallVectorImpl<ISD::InputArg> &Ins,
142 const SmallVectorImpl<ISD::InputArg> &Ins,
148 const SmallVectorImpl<ISD::InputArg> &Ins,
154 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.h | 89 Ins enumerator
123 const SmallVectorImpl<ISD::InputArg> &Ins,
145 const SmallVectorImpl<ISD::InputArg> &Ins,
155 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 136 const SmallVectorImpl<ISD::InputArg> &Ins,
142 const SmallVectorImpl<ISD::InputArg> &Ins,
148 const SmallVectorImpl<ISD::InputArg> &Ins,
154 const SmallVectorImpl<ISD::InputArg> &Ins,
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelLowering.h | 86 const SmallVectorImpl<ISD::InputArg> &Ins,
120 const SmallVectorImpl<ISD::InputArg> &Ins,
129 const SmallVectorImpl<ISD::InputArg> &Ins,
|