/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | InstructionSelectorImpl.h | 87 int64_t InsnID = MatchTable[CurrentIdx++]; in executeMatchTable() local 94 MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx); in executeMatchTable() 120 << "] = GIM_RecordInsn(" << InsnID << ", " << OpIdx in executeMatchTable() 140 int64_t InsnID = MatchTable[CurrentIdx++]; in executeMatchTable() local 143 assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); in executeMatchTable() 144 unsigned Opcode = State.MIs[InsnID]->getOpcode(); in executeMatchTable() 147 dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID in executeMatchTable() 158 int64_t InsnID = MatchTable[CurrentIdx++]; in executeMatchTable() local 163 assert(State.MIs[InsnID] != nullptr && "Used insn before defined"); in executeMatchTable() 164 const int64_t Opcode = State.MIs[InsnID]->getOpcode(); in executeMatchTable() [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenGlobalISel.inc | 782 GIM_CheckIsSafeToFold, /*InsnID*/1, 784 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::UXTAB, 788 GIR_AddImm, /*InsnID*/0, /*Imm*/0, 789 GIR_AddImm, /*InsnID*/0, /*Imm*/14, 790 GIR_AddRegister, /*InsnID*/0, ::zero_reg, 791 GIR_EraseFromParent, /*InsnID*/0, 792 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 806 GIM_CheckIsSafeToFold, /*InsnID*/1, 808 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::UXTAH, 812 GIR_AddImm, /*InsnID*/0, /*Imm*/0, [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenGlobalISel.inc | 874 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri, 877 GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm 878 GIR_EraseFromParent, /*InsnID*/0, 879 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 888 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri, 891 GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm 892 GIR_EraseFromParent, /*InsnID*/0, 893 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 902 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDWrr, 903 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
D | X86GenGlobalISel.inc | 854 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC8r, 857 GIR_EraseFromParent, /*InsnID*/0, 858 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 866 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC8r, 869 GIR_EraseFromParent, /*InsnID*/0, 870 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 879 GIM_CheckIsSafeToFold, /*InsnID*/1, 881 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8ri, 885 GIR_EraseFromParent, /*InsnID*/0, 886 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenGlobalISel.inc | 613 GIM_CheckIsSafeToFold, /*InsnID*/1, 614 GIM_CheckIsSafeToFold, /*InsnID*/2, 616 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::LSA, 621 GIR_EraseFromParent, /*InsnID*/0, 622 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, 640 GIM_CheckIsSafeToFold, /*InsnID*/1, 641 GIM_CheckIsSafeToFold, /*InsnID*/2, 643 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::LSA, 648 GIR_EraseFromParent, /*InsnID*/0, 649 GIR_ConstrainSelectedInstOperands, /*InsnID*/0, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
D | GlobalISelEmitter.td | 296 // R19C-NEXT: GIM_CheckIsSafeToFold, /*InsnID*/1, 302 // R19C-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/MyTarget::INSN4, 303 // R19C-NEXT: GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define, 305 // R19C-NEXT: GIR_ComplexRenderer, /*InsnID*/1, /*RendererID*/1, 306 // R19C-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/2, /*SubOperand*/0, // s… 307 // R19C-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/2, /*SubOperand*/1, // s… 308 // R19C-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/1, 309 // R19C-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/MyTarget::INSN3, 312 // R19C-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // s… 313 // R19C-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // s… [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
D | GlobalISelEmitter.cpp | 2316 unsigned InsnID; member in __anon0c06086d0111::AddRegisterRenderer 2320 AddRegisterRenderer(unsigned InsnID, const Record *RegisterDef) in AddRegisterRenderer() argument 2321 : OperandRenderer(OR_Register), InsnID(InsnID), RegisterDef(RegisterDef) { in AddRegisterRenderer() 2330 << MatchTable::Comment("InsnID") << MatchTable::IntValue(InsnID) in emitRenderOpcodes() 2345 unsigned InsnID; member in __anon0c06086d0111::TempRegRenderer 2350 TempRegRenderer(unsigned InsnID, unsigned TempRegID, bool IsDef = false) in TempRegRenderer() argument 2351 : OperandRenderer(OR_Register), InsnID(InsnID), TempRegID(TempRegID), in TempRegRenderer() 2360 << MatchTable::Comment("InsnID") << MatchTable::IntValue(InsnID) in emitRenderOpcodes() 2374 unsigned InsnID; member in __anon0c06086d0111::ImmRenderer 2378 ImmRenderer(unsigned InsnID, int64_t Imm) in ImmRenderer() argument [all …]
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