| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
| D | ARCFrameLowering.cpp | 432 unsigned Reg, int NumBytes, bool IsAdd, in emitRegUpdate() argument
434 unsigned Opc = IsAdd ? ARC::ADD_rru6 : ARC::SUB_rru6; in emitRegUpdate()
457 bool IsAdd = (Old.getOpcode() == ARC::ADJCALLSTACKUP); in eliminateCallFramePseudoInstr() local
458 emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII); in eliminateCallFramePseudoInstr()
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| /external/tensorflow/tensorflow/core/grappler/ |
| D | op_types.h | 25 bool IsAdd(const NodeDef& node);
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| D | op_types.cc | 29 bool IsAdd(const NodeDef& node) { in IsAdd() function
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| /external/tensorflow/tensorflow/core/grappler/optimizers/ |
| D | arithmetic_optimizer.cc | 500 if (!IsAdd(node) && !IsAddN(node)) { in CanOptimize()
857 if (i > 0 && !IsAdd(*node)) { in GetUniqueFactors()
915 return IsMul(node) || IsAdd(node); in IsBinaryAssociative()
1311 return IsAdd(*node) || IsSub(*node); in IsSupported()
1324 node->set_op(IsAdd(*node) ? "Sub" : "Add"); in TrySimplify()
1327 } else if (IsAdd(*node) && IsNeg(*x)) { in TrySimplify()
2605 if (!IsAdd(*input)) { in TrySimplify()
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| D | constant_folding.cc | 2644 const bool is_add = IsAdd(*node) || IsBiasAdd(*node) || IsLogicalOr(*node); in SimplifyArithmeticOperations()
2829 if (has_fetch_ && (IsAdd(*node) || IsMul(*node)) && in ConstantPushDown()
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| D | layout_optimizer.cc | 318 IsAdd(node) || IsAtan2(node) || IsComparisonOp(node) || IsComplex(node) || in IsBinaryOp()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 583 bool IsAdd = (N->getOpcode() == ISD::ADD); in SelectADD_SUB_I64() local
601 unsigned Opc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in SelectADD_SUB_I64()
602 unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in SelectADD_SUB_I64()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 703 bool IsAdd = Opcode == ISD::ADD || Opcode == ISD::ADDC || Opcode == ISD::ADDE; in SelectADD_SUB_I64() local
720 unsigned Opc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in SelectADD_SUB_I64()
721 unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in SelectADD_SUB_I64()
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| D | SIInstrInfo.cpp | 4229 bool IsAdd = (Inst.getOpcode() == AMDGPU::S_ADD_U64_PSEUDO); in splitScalar64BitAddSub() local
4263 unsigned LoOpc = IsAdd ? AMDGPU::V_ADD_I32_e64 : AMDGPU::V_SUB_I32_e64; in splitScalar64BitAddSub()
4270 unsigned HiOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in splitScalar64BitAddSub()
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| D | SIISelLowering.cpp | 3273 bool IsAdd = (MI.getOpcode() == AMDGPU::S_ADD_U64_PSEUDO); in EmitInstrWithCustomInserter() local
3275 unsigned LoOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in EmitInstrWithCustomInserter()
3276 unsigned HiOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in EmitInstrWithCustomInserter()
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX86BaseImpl.h | 5630 bool IsAdd = false;
5673 IsAdd = true; // treat it as an add if the above conditions hold
5675 IsAdd = ArithInst->getOp() == InstArithmetic::Add;
5684 if (!IsAdd && Var1)
5694 if (!IsAdd && Reloc1)
5704 IsAdd ? Const0->getValue() : -Const0->getValue();
5711 IsAdd ? Const1->getValue() : -Const1->getValue();
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| D | IceTargetLoweringMIPS32.cpp | 5310 bool IsAdd = Kind == InstArithmetic::Add; in matchOffsetBase() local
5333 if (!IsAdd && Var1) in matchOffsetBase()
5341 int32_t MoreOffset = IsAdd ? Const0->getValue() : -Const0->getValue(); in matchOffsetBase()
5347 int32_t MoreOffset = IsAdd ? Const1->getValue() : -Const1->getValue(); in matchOffsetBase()
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| D | IceTargetLoweringARM32.cpp | 5710 bool IsAdd = Kind == InstArithmetic::Add; in matchOffsetBase() local
5733 if (!IsAdd && Var1) in matchOffsetBase()
5741 int32_t MoreOffset = IsAdd ? Const0->getValue() : -Const0->getValue(); in matchOffsetBase()
5747 int32_t MoreOffset = IsAdd ? Const1->getValue() : -Const1->getValue(); in matchOffsetBase()
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| /external/clang/lib/Sema/ |
| D | SemaOpenMP.cpp | 4274 bool IsAdd = BO->getOpcode() == BO_Add; in CheckIncRHS() local
4276 return SetStep(BO->getRHS(), !IsAdd); in CheckIncRHS()
4277 if (IsAdd && GetInitLCDecl(BO->getRHS()) == LCDecl) in CheckIncRHS()
4281 bool IsAdd = CE->getOperator() == OO_Plus; in CheckIncRHS() local
4282 if ((IsAdd || CE->getOperator() == OO_Minus) && CE->getNumArgs() == 2) { in CheckIncRHS()
4284 return SetStep(CE->getArg(1), !IsAdd); in CheckIncRHS()
4285 if (IsAdd && GetInitLCDecl(CE->getArg(1)) == LCDecl) in CheckIncRHS()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 3501 bool IsAdd = Node->getOpcode() == ISD::UADDO; in ExpandNode() local
3503 unsigned OpcCarry = IsAdd ? ISD::ADDCARRY : ISD::SUBCARRY; in ExpandNode()
3513 SDValue Sum = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in ExpandNode()
3519 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in ExpandNode()
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| D | DAGCombiner.cpp | 1964 bool IsAdd = N->getOpcode() == ISD::ADD; in foldAddSubBoolOfMaskedVal() local
1965 SDValue C = IsAdd ? N->getOperand(1) : N->getOperand(0); in foldAddSubBoolOfMaskedVal()
1966 SDValue Z = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubBoolOfMaskedVal()
1991 SDValue C1 = IsAdd ? DAG.getConstant(CN->getAPIntValue() + 1, DL, VT) : in foldAddSubBoolOfMaskedVal()
1993 return DAG.getNode(IsAdd ? ISD::SUB : ISD::ADD, DL, VT, C1, LowBit); in foldAddSubBoolOfMaskedVal()
2004 bool IsAdd = N->getOpcode() == ISD::ADD; in foldAddSubOfSignBit() local
2005 SDValue ConstantOp = IsAdd ? N->getOperand(1) : N->getOperand(0); in foldAddSubOfSignBit()
2006 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubOfSignBit()
2029 auto ShOpcode = IsAdd ? ISD::SRA : ISD::SRL; in foldAddSubOfSignBit()
2031 APInt NewC = IsAdd ? C->getAPIntValue() + 1 : C->getAPIntValue() - 1; in foldAddSubOfSignBit()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1034 bool IsAdd = ROOTNode->getOpcode() == ISD::ADD; in performMADD_MSUBCombine() local
1035 unsigned Opcode = IsAdd ? (IsUnsigned ? MipsISD::MAddu : MipsISD::MAdd) in performMADD_MSUBCombine()
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