Searched refs:IsFP64 (Results 1 – 4 of 4) sorted by relevance
/external/swiftshader/third_party/subzero/pydir/ |
D | gen_arm32_reg_tables.py | 20 IsFP32=0, IsFP64=0, IsVec128=0, Aliases=None): argument 24 assert not (IsFP32 and IsFP64) 26 assert not (IsFP64 and IsVec128) 27 assert not ((IsGPR) and (IsFP32 or IsFP64 or IsVec128)) 145 Reg( 'd0', 0, IsScratch=1, CCArg=1, IsFP64=1, Aliases= 'd0, q0, s0, s1'), 146 Reg( 'd1', 1, IsScratch=1, CCArg=2, IsFP64=1, Aliases= 'd1, q0, s2, s3'), 147 Reg( 'd2', 2, IsScratch=1, CCArg=3, IsFP64=1, Aliases= 'd2, q1, s4, s5'), 148 Reg( 'd3', 3, IsScratch=1, CCArg=4, IsFP64=1, Aliases= 'd3, q1, s6, s7'), 149 Reg( 'd4', 4, IsScratch=1, CCArg=5, IsFP64=1, Aliases= 'd4, q2, s8, s9'), 150 Reg( 'd5', 5, IsScratch=1, CCArg=6, IsFP64=1, Aliases= 'd5, q2, s10, s11'), [all …]
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/external/swiftshader/third_party/subzero/src/ |
D | IceRegistersARM32.def | 7 …h, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128, Aliases) 26 …h, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128, Aliases) 35 …h, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128, Aliases) 70 …h, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128, Aliases) 105 …h, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128, Aliases)
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D | IceRegistersARM32.h | 97 unsigned IsFP64 : 1; member 182 return RegTable[RegNum].IsFP64; in isEncodedDReg()
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D | IceTargetLoweringARM32.cpp | 327 Float64Registers[i] = Entry.IsFP64; in staticInit() 348 } else if (Entry.IsFP64) { in staticInit()
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