Home
last modified time | relevance | path

Searched refs:LAW_SIZE_4K (Results 1 – 16 of 16) sorted by relevance

/external/u-boot/board/freescale/common/p_corenet/
Dlaw.c22 SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC),
25 SET_LAW(CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC),
/external/u-boot/board/freescale/p1022ds/
Dlaw.c14 SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC),
/external/u-boot/board/freescale/mpc8536ds/
Dlaw.c15 SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC),
/external/u-boot/board/freescale/mpc8572ds/
Dlaw.c15 SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC),
/external/u-boot/board/varisys/cyrus/
Dlaw.c13 SET_LAW(CONFIG_SYS_LBC1_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC),
/external/u-boot/board/freescale/b4860qds/
Dlaw.c18 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
/external/u-boot/board/freescale/t4qds/
Dlaw.c22 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
/external/u-boot/board/freescale/t4rdb/
Dlaw.c19 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
/external/u-boot/board/freescale/t208xrdb/
Dlaw.c22 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
/external/u-boot/board/freescale/t208xqds/
Dlaw.c22 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
/external/u-boot/board/freescale/t1040qds/
Dlaw.c21 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
/external/u-boot/board/freescale/t102xrdb/
Dlaw.c21 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
/external/u-boot/board/freescale/t102xqds/
Dlaw.c21 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
/external/u-boot/arch/powerpc/include/asm/
Dfsl_law.h21 LAW_SIZE_4K = 0xb, enumerator
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dmp.c251 u32 cpu_up_mask, whoami, brsize = LAW_SIZE_4K; in plat_mp_up()
Dstart.S578 #define LAW_SIZE_4K 0xb macro
579 #define CCSRBAR_LAWAR (LAW_EN | (0x1e << 20) | LAW_SIZE_4K)