| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 1087 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in foldLogicOfFCmps() local
1091 if (LHS0 == RHS1 && RHS0 == LHS1) { in foldLogicOfFCmps()
1111 if (LHS0 == RHS0 && LHS1 == RHS1) { in foldLogicOfFCmps()
1115 return getFCmpValue(NewPred, LHS0, LHS1, Builder); in foldLogicOfFCmps()
1125 if (match(LHS1, m_PosZeroFP()) && match(RHS1, m_PosZeroFP())) in foldLogicOfFCmps()
2360 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in foldXorOfICmps() local
2366 if ((PredL == CmpInst::ICMP_SGT && match(LHS1, m_AllOnes()) && in foldXorOfICmps()
2368 (PredL == CmpInst::ICMP_SLT && match(LHS1, m_Zero()) && in foldXorOfICmps()
2375 if ((PredL == CmpInst::ICMP_SGT && match(LHS1, m_AllOnes()) && in foldXorOfICmps()
2377 (PredL == CmpInst::ICMP_SLT && match(LHS1, m_Zero()) && in foldXorOfICmps()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| D | InstructionSimplify.cpp | 1698 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in simplifyAndOrOfFCmps() local
1714 if ((isKnownNeverNaN(LHS0) && (LHS1 == RHS0 || LHS1 == RHS1)) || in simplifyAndOrOfFCmps()
1715 (isKnownNeverNaN(LHS1) && (LHS0 == RHS0 || LHS0 == RHS1))) in simplifyAndOrOfFCmps()
1726 if ((isKnownNeverNaN(RHS0) && (RHS1 == LHS0 || RHS1 == LHS1)) || in simplifyAndOrOfFCmps()
1727 (isKnownNeverNaN(RHS1) && (RHS0 == LHS0 || RHS0 == LHS1))) in simplifyAndOrOfFCmps()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 556 SDValue LHS1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS_0, in getAVRCmp() local
584 Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS1, RHS1, Cmp); in getAVRCmp()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3772 SDValue LHS1 = Op.getOperand(0); in isSaturatingConditional() local
3790 SDValue *K1 = isa<ConstantSDNode>(LHS1) ? &LHS1 : isa<ConstantSDNode>(RHS1) in isSaturatingConditional()
3797 SDValue V1Tmp = (K1 && *K1 == LHS1) ? RHS1 : LHS1; in isSaturatingConditional()
3817 isLowerSaturate(LHS1, RHS1, TrueVal1, FalseVal1, CC1, *K1) in isSaturatingConditional()
3822 isUpperSaturate(LHS1, RHS1, TrueVal1, FalseVal1, CC1, *K1) in isSaturatingConditional()
4044 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local
4046 expandf64Toi32(LHS, DAG, LHS1, LHS2); in OptimizeVFPBrcond()
4053 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond()
8354 unsigned LHS1 = MI.getOperand(1).getReg(); in EmitInstrWithCustomInserter() local
8359 .addReg(LHS1).addImm(0)); in EmitInstrWithCustomInserter()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4302 SDValue LHS1 = Op.getOperand(0); in isSaturatingConditional() local
4320 SDValue *K1 = isa<ConstantSDNode>(LHS1) ? &LHS1 : isa<ConstantSDNode>(RHS1) in isSaturatingConditional()
4327 SDValue V1Tmp = (K1 && *K1 == LHS1) ? RHS1 : LHS1; in isSaturatingConditional()
4347 isLowerSaturate(LHS1, RHS1, TrueVal1, FalseVal1, CC1, *K1) in isSaturatingConditional()
4353 isUpperSaturate(LHS1, RHS1, TrueVal1, FalseVal1, CC1, *K1) in isSaturatingConditional()
4652 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local
4654 expandf64Toi32(LHS, DAG, LHS1, LHS2); in OptimizeVFPBrcond()
4661 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond()
9390 unsigned LHS1 = MI.getOperand(1).getReg(); in EmitInstrWithCustomInserter() local
9394 .addReg(LHS1) in EmitInstrWithCustomInserter()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 2921 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local
2923 expandf64Toi32(LHS, DAG, LHS1, LHS2); in OptimizeVFPBrcond()
2928 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond()
6189 unsigned LHS1 = MI->getOperand(1).getReg(); in EmitInstrWithCustomInserter() local
6194 .addReg(LHS1).addImm(0)); in EmitInstrWithCustomInserter()
6203 .addReg(LHS1).addReg(RHS1)); in EmitInstrWithCustomInserter()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 8440 SDValue LHS1 = Extract128BitVector(LHS, Idx0, DAG, dl); in Lower256IntVSETCC() local
8452 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, RHS1, CC), in Lower256IntVSETCC()
9794 SDValue LHS1 = Extract128BitVector(LHS, Idx0, DAG, dl); in Lower256IntArith() local
9806 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, RHS1), in Lower256IntArith()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 18250 SDValue LHS1 = extract128BitVector(LHS, 0, DAG, dl); in Lower256IntVSETCC() local
18262 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, RHS1, CC), in Lower256IntVSETCC()
22436 SDValue LHS1 = extract128BitVector(LHS, 0, DAG, dl); in Lower256IntArith() local
22448 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, RHS1), in Lower256IntArith()
22465 SDValue LHS1 = extract256BitVector(LHS, 0, DAG, dl); in Lower512IntArith() local
22477 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS1, RHS1), in Lower512IntArith()
|