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Searched refs:Load0 (Results 1 – 7 of 7) sorted by relevance

/external/llvm/lib/Transforms/Scalar/
DMergedLoadStoreMotion.cpp218 LoadInst *Load0) { in canHoistFromBlock() argument
219 BasicBlock *BB0 = Load0->getParent(); in canHoistFromBlock()
222 Load0->getPointerOperand(), Load0->getAlignment(), in canHoistFromBlock()
223 Load0->getModule()->getDataLayout(), in canHoistFromBlock()
234 MemoryLocation Loc0 = MemoryLocation::get(Load0); in canHoistFromBlock()
236 if (Load0->isSameOperationAs(Load1) && AA->isMustAlias(Loc0, Loc1) && in canHoistFromBlock()
239 !isLoadHoistBarrierInRange(BB0->front(), *Load0, Load0, in canHoistFromBlock()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.cpp50 bool AMDGPUInstrInfo::shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, in shouldScheduleLoadsNear() argument
DSIInstrInfo.cpp93 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
96 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
99 unsigned Opc0 = Load0->getMachineOpcode(); in areLoadsFromSameBasePtr()
109 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
113 if (Load0->getOperand(1) != Load1->getOperand(1)) in areLoadsFromSameBasePtr()
117 if (findChainOperand(Load0) != findChainOperand(Load1)) in areLoadsFromSameBasePtr()
127 Offset0 = cast<ConstantSDNode>(Load0->getOperand(2))->getZExtValue(); in areLoadsFromSameBasePtr()
133 assert(getNumOperandsNoGlue(Load0) == getNumOperandsNoGlue(Load1)); in areLoadsFromSameBasePtr()
136 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
140 dyn_cast<ConstantSDNode>(Load0->getOperand(1)); in areLoadsFromSameBasePtr()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp150 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
153 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
156 unsigned Opc0 = Load0->getMachineOpcode(); in areLoadsFromSameBasePtr()
166 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
170 if (Load0->getOperand(1) != Load1->getOperand(1)) in areLoadsFromSameBasePtr()
174 if (findChainOperand(Load0) != findChainOperand(Load1)) in areLoadsFromSameBasePtr()
184 Offset0 = cast<ConstantSDNode>(Load0->getOperand(2))->getZExtValue(); in areLoadsFromSameBasePtr()
195 assert(getNumOperandsNoGlue(Load0) == getNumOperandsNoGlue(Load1)); in areLoadsFromSameBasePtr()
198 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
202 dyn_cast<ConstantSDNode>(Load0->getOperand(1)); in areLoadsFromSameBasePtr()
[all …]
DSIInstrInfo.h171 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp1428 SDValue Load0 = DAG.getLoad(SingleTy, dl, Chain, Base0, MOp0); in SplitHvxMemOp() local
1431 { DAG.getNode(ISD::CONCAT_VECTORS, dl, MemTy, Load0, Load1), in SplitHvxMemOp()
1433 Load0.getValue(1), Load1.getValue(1)) }, dl); in SplitHvxMemOp()
DHexagonISelLowering.cpp2719 SDValue Load0 = DAG.getLoad(LoadTy, dl, Chain, Base0, WideMMO); in LowerUnalignedLoad() local
2723 {Load1, Load0, BaseNoOff.getOperand(0)}); in LowerUnalignedLoad()
2725 Load0.getValue(1), Load1.getValue(1)); in LowerUnalignedLoad()