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Searched refs:MCTL_CR_DDR3 (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-sunxi/
Ddram_sun8i_a33.h166 #define MCTL_CR_DDR3 (3 << 16) macro
Ddram_sunxi_dw.h51 #define MCTL_CR_DDR3 (0x3 << 16) macro
Ddram_sun6i.h258 #define MCTL_CR_DDR3 (3 << 16) macro
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun8i_a33.c38 MCTL_CR_CHANNEL(1) | MCTL_CR_DDR3 | in mctl_set_cr()
Ddram_sun6i.c271 writel(MCTL_CR_UNKNOWN | MCTL_CR_CHANNEL(para->chan) | MCTL_CR_DDR3 | in mctl_com_init()
Ddram_sunxi_dw.c341 MCTL_CR_DDR3 | MCTL_CR_2T | in mctl_set_cr()