Searched refs:MC_CGM2_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance
228 aux_source_clk_config(MC_CGM2_BASE_ADDR, 2, MC_CGM_ACn_SEL_ENETPLL); in setup_aux_clocks()229 aux_div_clk_config(MC_CGM2_BASE_ADDR, 2, 0, 9); in setup_aux_clocks()
41 #define MC_CGM2_BASE_ADDR (AIPS0_BASE_ADDR + 0x00042000) macro