| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64CollectLOH.cpp | 283 const MachineInstr *MI0; ///< First instruction involved in the LOH. member
304 Info.MI0 = &MI; in handleUse()
310 Info.MI0 = &MI; in handleUse()
315 Info.MI0 = &MI; in handleUse()
320 Info.MI0 = &MI; in handleUse()
394 << '\t' << MI << '\t' << *Info.MI0); in handleADRP()
395 AFI.addLOHDirective(MCLOH_AdrpAdd, {&MI, Info.MI0}); in handleADRP()
399 if (supportLoadFromLiteral(*Info.MI0)) { in handleADRP()
401 << '\t' << MI << '\t' << *Info.MI0); in handleADRP()
402 AFI.addLOHDirective(MCLOH_AdrpLdr, {&MI, Info.MI0}); in handleADRP()
[all …]
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetInstrInfo.h | 241 virtual bool produceSameValue(const MachineInstr *MI0,
758 virtual bool produceSameValue(const MachineInstr *MI0,
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | TargetInstrInfoImpl.cpp | 213 TargetInstrInfoImpl::produceSameValue(const MachineInstr *MI0, in produceSameValue() argument
216 return MI0->isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1163 bool ARMBaseInstrInfo::produceSameValue(const MachineInstr *MI0, in produceSameValue() argument
1166 int Opcode = MI0->getOpcode(); in produceSameValue()
1178 if (MI0->getNumOperands() != MI1->getNumOperands()) in produceSameValue()
1181 const MachineOperand &MO0 = MI0->getOperand(1); in produceSameValue()
1194 const MachineFunction *MF = MI0->getParent()->getParent(); in produceSameValue()
1215 if (MI0->getNumOperands() != MI1->getNumOperands()) in produceSameValue()
1218 unsigned Addr0 = MI0->getOperand(1).getReg(); in produceSameValue()
1235 for (unsigned i = 3, e = MI0->getNumOperands(); i != e; ++i) { in produceSameValue()
1237 const MachineOperand &MO0 = MI0->getOperand(i); in produceSameValue()
1245 return MI0->isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
|
| D | ARMBaseInstrInfo.h | 142 virtual bool produceSameValue(const MachineInstr *MI0,
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1450 bool ARMBaseInstrInfo::produceSameValue(const MachineInstr &MI0, in produceSameValue() argument
1453 unsigned Opcode = MI0.getOpcode(); in produceSameValue()
1466 if (MI0.getNumOperands() != MI1.getNumOperands()) in produceSameValue()
1469 const MachineOperand &MO0 = MI0.getOperand(1); in produceSameValue()
1483 const MachineFunction *MF = MI0.getParent()->getParent(); in produceSameValue()
1504 if (MI0.getNumOperands() != MI1.getNumOperands()) in produceSameValue()
1507 unsigned Addr0 = MI0.getOperand(1).getReg(); in produceSameValue()
1524 for (unsigned i = 3, e = MI0.getNumOperands(); i != e; ++i) { in produceSameValue()
1526 const MachineOperand &MO0 = MI0.getOperand(i); in produceSameValue()
1534 return MI0.isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
|
| D | ARMBaseInstrInfo.h | 205 bool produceSameValue(const MachineInstr &MI0, const MachineInstr &MI1,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1628 bool ARMBaseInstrInfo::produceSameValue(const MachineInstr &MI0, in produceSameValue() argument
1631 unsigned Opcode = MI0.getOpcode(); in produceSameValue()
1644 if (MI0.getNumOperands() != MI1.getNumOperands()) in produceSameValue()
1647 const MachineOperand &MO0 = MI0.getOperand(1); in produceSameValue()
1661 const MachineFunction *MF = MI0.getParent()->getParent(); in produceSameValue()
1682 if (MI0.getNumOperands() != MI1.getNumOperands()) in produceSameValue()
1685 unsigned Addr0 = MI0.getOperand(1).getReg(); in produceSameValue()
1702 for (unsigned i = 3, e = MI0.getNumOperands(); i != e; ++i) { in produceSameValue()
1704 const MachineOperand &MO0 = MI0.getOperand(i); in produceSameValue()
1712 return MI0.isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
|
| D | ARMBaseInstrInfo.h | 236 bool produceSameValue(const MachineInstr &MI0, const MachineInstr &MI1,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 421 bool TargetInstrInfo::produceSameValue(const MachineInstr &MI0, in produceSameValue() argument
424 return MI0.isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
|
| /external/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 385 bool TargetInstrInfo::produceSameValue(const MachineInstr &MI0, in produceSameValue() argument
388 return MI0.isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 439 virtual bool produceSameValue(const MachineInstr &MI0,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 511 virtual bool produceSameValue(const MachineInstr &MI0,
|
| /external/honggfuzz/examples/apache-httpd/corpus_http1/ |
| D | e4642610294b8d4d589d09a6c3dbcb04.00007127.honggfuzz.cov | 36 Ty���m��JS��4��`�t�3?�d�o d�o�tt�&�P�x�������I ��MI0����4\�K
|
| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | e4642610294b8d4d589d09a6c3dbcb04.00007127.honggfuzz.cov | 36 Ty���m��JS��4��`�t�3?�d�o d�o�tt�&�P�x�������I ��MI0����4\�K
|
| D | a307870e896cdda1b326deca0994db1a.00005227.honggfuzz.cov | 36 Ty���m��JS��4��`�t�3?�d�o d�o�tt�&�P�x�������I ��MI0����4\�K
|
| D | 08e964b81a1a7e25ef024fc2be601ef2.0000c10b.honggfuzz.cov | 60 Ty���m��JS��4��`�t�3?�d�o d�o�tt�&�P�x�������I ��MI0����4\�K
|
| D | 73bcacc3cd07b6865fbd698d09f1235a.0000fd65.honggfuzz.cov | 195 Ty���m��JS��4��`�t�3?�d�o d�o�tt�&�P�x�������I ��MI0����4\�K
|