| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | IRTranslator.h | 203 bool translateBitCast(const User &U, MachineIRBuilder &MIRBuilder);
206 bool translateLoad(const User &U, MachineIRBuilder &MIRBuilder);
209 bool translateStore(const User &U, MachineIRBuilder &MIRBuilder);
212 bool translateMemfunc(const CallInst &CI, MachineIRBuilder &MIRBuilder,
215 void getStackGuard(unsigned DstReg, MachineIRBuilder &MIRBuilder);
218 MachineIRBuilder &MIRBuilder);
221 MachineIRBuilder &MIRBuilder);
223 bool translateInlineAsm(const CallInst &CI, MachineIRBuilder &MIRBuilder);
229 unsigned packRegs(const Value &V, MachineIRBuilder &MIRBuilder);
231 void unpackRegs(const Value &V, unsigned Src, MachineIRBuilder &MIRBuilder);
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| D | CallLowering.h | 62 ValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in ValueHandler()
64 : MIRBuilder(MIRBuilder), MRI(MRI), AssignFn(AssignFn) {} in ValueHandler()
108 MachineIRBuilder &MIRBuilder; member
133 bool handleAssignments(MachineIRBuilder &MIRBuilder, ArrayRef<ArgInfo> Args,
145 virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() argument
159 virtual bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments() argument
185 virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, in lowerCall() argument
208 bool lowerCall(MachineIRBuilder &MIRBuilder, ImmutableCallSite CS,
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| D | LegalizerHelper.h | 90 MachineIRBuilder MIRBuilder; variable
121 createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 103 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingValueHandler()
105 : ValueHandler(MIRBuilder, MRI, AssignFn), MIB(MIB), in OutgoingValueHandler()
106 DL(MIRBuilder.getMF().getDataLayout()), in OutgoingValueHandler()
107 STI(MIRBuilder.getMF().getSubtarget<X86Subtarget>()) {} in OutgoingValueHandler()
114 MIRBuilder.buildCopy(SPReg, STI.getRegisterInfo()->getStackRegister()); in getStackAddress()
117 MIRBuilder.buildConstant(OffsetReg, Offset); in getStackAddress()
120 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg); in getStackAddress()
122 MPO = MachinePointerInfo::getStack(MIRBuilder.getMF(), Offset); in getStackAddress()
143 auto MIB = MIRBuilder.buildAnyExt(LLT::scalar(PhysRegSize), ValVReg); in assignValueToReg()
148 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
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| D | X86CallLowering.h | 35 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
38 bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 55 IncomingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in IncomingArgHandler()
57 : ValueHandler(MIRBuilder, MRI, AssignFn), StackUsed(0) {} in IncomingArgHandler()
61 auto &MFI = MIRBuilder.getMF().getFrameInfo(); in getStackAddress()
63 MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI); in getStackAddress()
65 MIRBuilder.buildFrameIndex(AddrReg, FI); in getStackAddress()
75 MIRBuilder.buildCopy(ValVReg, PhysReg); in assignValueToReg()
80 auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg); in assignValueToReg()
81 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
89 auto MMO = MIRBuilder.getMF().getMachineMemOperand( in assignValueToAddress()
92 MIRBuilder.buildLoad(ValVReg, Addr, *MMO); in assignValueToAddress()
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| D | AArch64LegalizerInfo.cpp | 394 MachineIRBuilder &MIRBuilder) const { in legalizeCustom()
400 return legalizeVaArg(MI, MRI, MIRBuilder); in legalizeCustom()
408 MachineIRBuilder &MIRBuilder) const { in legalizeVaArg()
409 MIRBuilder.setInstr(MI); in legalizeVaArg()
410 MachineFunction &MF = MIRBuilder.getMF(); in legalizeVaArg()
420 MIRBuilder.buildLoad( in legalizeVaArg()
428 auto AlignMinus1 = MIRBuilder.buildConstant(IntPtrTy, Align - 1); in legalizeVaArg()
431 MIRBuilder.buildGEP(ListTmp, List, AlignMinus1->getOperand(0).getReg()); in legalizeVaArg()
434 MIRBuilder.buildPtrMask(DstPtr, ListTmp, Log2_64(Align)); in legalizeVaArg()
439 MIRBuilder.buildLoad( in legalizeVaArg()
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| D | AArch64LegalizerInfo.h | 31 MachineIRBuilder &MIRBuilder) const override;
35 MachineIRBuilder &MIRBuilder) const;
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| D | AArch64CallLowering.h | 40 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
43 bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 33 MIRBuilder.setMF(MF); in LegalizerHelper()
62 return LI.legalizeCustom(MI, MRI, MIRBuilder) ? Legalized in legalizeInstrStep()
74 MIRBuilder.buildUnmerge(VRegs, Reg); in extractParts()
115 llvm::createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall, in createLibcall() argument
118 auto &CLI = *MIRBuilder.getMF().getSubtarget().getCallLowering(); in createLibcall()
119 auto &TLI = *MIRBuilder.getMF().getSubtarget().getTargetLowering(); in createLibcall()
122 MIRBuilder.getMF().getFrameInfo().setHasCalls(true); in createLibcall()
123 if (!CLI.lowerCall(MIRBuilder, TLI.getLibcallCallingConv(Libcall), in createLibcall()
132 simpleLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, unsigned Size, in simpleLibcall() argument
139 return createLibcall(MIRBuilder, Libcall, {MI.getOperand(0).getReg(), OpType}, in simpleLibcall()
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| D | IRTranslator.cpp | 272 MachineIRBuilder &MIRBuilder) { in translateBinaryOp() argument
282 MIRBuilder.buildInstr(Opcode).addDef(Res).addUse(Op0).addUse(Op1); in translateBinaryOp()
286 bool IRTranslator::translateFSub(const User &U, MachineIRBuilder &MIRBuilder) { in translateFSub() argument
290 MIRBuilder.buildInstr(TargetOpcode::G_FNEG) in translateFSub()
295 return translateBinaryOp(TargetOpcode::G_FSUB, U, MIRBuilder); in translateFSub()
299 MachineIRBuilder &MIRBuilder) { in translateCompare() argument
308 MIRBuilder.buildICmp(Pred, Res, Op0, Op1); in translateCompare()
310 MIRBuilder.buildCopy( in translateCompare()
313 MIRBuilder.buildCopy( in translateCompare()
316 MIRBuilder.buildFCmp(Pred, Res, Op0, Op1); in translateCompare()
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| D | CallLowering.cpp | 27 MachineIRBuilder &MIRBuilder, ImmutableCallSite CS, unsigned ResReg, in lowerCall() argument
58 return lowerCall(MIRBuilder, CS.getCallingConv(), Callee, OrigRet, OrigArgs); in lowerCall()
110 bool CallLowering::handleAssignments(MachineIRBuilder &MIRBuilder, in handleAssignments() argument
113 MachineFunction &MF = MIRBuilder.getMF(); in handleAssignments()
168 auto MIB = MIRBuilder.buildAnyExt(LocTy, ValReg); in extendRegister()
173 MIRBuilder.buildSExt(NewReg, ValReg); in extendRegister()
178 MIRBuilder.buildZExt(NewReg, ValReg); in extendRegister()
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| D | Legalizer.cpp | 106 Helper.MIRBuilder.recordInsertions([&](MachineInstr *MI) { in runOnMachineFunction()
119 LegalizationArtifactCombiner ArtCombiner(Helper.MIRBuilder, MF.getRegInfo(), LInfo); in runOnMachineFunction()
141 Helper.MIRBuilder.stopRecordingInsertions(); in runOnMachineFunction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 90 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingValueHandler()
92 : ValueHandler(MIRBuilder, MRI, AssignFn), MIB(MIB) {} in OutgoingValueHandler()
102 MIRBuilder.buildCopy(SPReg, ARM::SP); in getStackAddress()
105 MIRBuilder.buildConstant(OffsetReg, Offset); in getStackAddress()
108 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg); in getStackAddress()
110 MPO = MachinePointerInfo::getStack(MIRBuilder.getMF(), Offset); in getStackAddress()
123 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
133 auto MMO = MIRBuilder.getMF().getMachineMemOperand( in assignValueToAddress()
136 MIRBuilder.buildStore(ExtReg, Addr, *MMO); in assignValueToAddress()
157 MIRBuilder.buildUnmerge(NewRegs, Arg.Reg); in assignCustomValue()
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| D | ARMLegalizerInfo.cpp | 305 MachineIRBuilder &MIRBuilder) const { in legalizeCustom()
308 MIRBuilder.setInstr(MI); in legalizeCustom()
309 LLVMContext &Ctx = MIRBuilder.getMF().getFunction().getContext(); in legalizeCustom()
329 getLLTForType(*RetTy, MIRBuilder.getMF().getDataLayout())); in legalizeCustom()
331 auto Status = createLibcall(MIRBuilder, Libcall, {RetVal, RetTy}, in legalizeCustom()
340 MIRBuilder.buildUnmerge( in legalizeCustom()
360 MIRBuilder.buildConstant(OriginalResult, in legalizeCustom()
374 createLibcall(MIRBuilder, Libcall.LibcallID, {LibcallResult, RetTy}, in legalizeCustom()
393 MIRBuilder.buildTrunc(ProcessedResult, LibcallResult); in legalizeCustom()
398 MIRBuilder.buildConstant(Zero, 0); in legalizeCustom()
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| D | ARMCallLowering.h | 39 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
42 bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
47 bool lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.cpp | 45 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in IncomingValueHandler() argument
46 : MipsHandler(MIRBuilder, MRI) {} in IncomingValueHandler()
61 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
66 MachineMemOperand *MMO = MIRBuilder.getMF().getMachineMemOperand( in buildLoad()
68 MIRBuilder.buildLoad(Val, Addr, *MMO); in buildLoad()
74 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler() argument
76 : IncomingValueHandler(MIRBuilder, MRI), MIB(MIB) {} in CallReturnHandler()
90 MIRBuilder.buildCopy(ValVReg, PhysReg); in assignValueToReg()
96 MachineFrameInfo &MFI = MIRBuilder.getMF().getFrameInfo(); in getStackAddress()
99 MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI); in getStackAddress()
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| D | MipsCallLowering.h | 29 MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in MipsHandler() argument
30 : MIRBuilder(MIRBuilder), MRI(MRI) {} in MipsHandler()
37 MachineIRBuilder &MIRBuilder; variable
56 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
59 bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
72 void subTargetRegTypeForCallingConv(MachineIRBuilder &MIRBuilder,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 34 bool AMDGPUCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() argument
40 MIRBuilder.buildInstr(AMDGPU::S_ENDPGM); in lowerReturn()
44 unsigned AMDGPUCallLowering::lowerParameterPtr(MachineIRBuilder &MIRBuilder, in lowerParameterPtr() argument
48 MachineFunction &MF = MIRBuilder.getMF(); in lowerParameterPtr()
61 MIRBuilder.buildConstant(OffsetReg, Offset); in lowerParameterPtr()
63 MIRBuilder.buildGEP(DstReg, KernArgSegmentVReg, OffsetReg); in lowerParameterPtr()
68 void AMDGPUCallLowering::lowerParameter(MachineIRBuilder &MIRBuilder, in lowerParameter() argument
72 MachineFunction &MF = MIRBuilder.getMF(); in lowerParameter()
78 unsigned PtrReg = lowerParameterPtr(MIRBuilder, ParamTy, Offset); in lowerParameter()
86 MIRBuilder.buildLoad(DstReg, PtrReg, *MMO); in lowerParameter()
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| D | AMDGPUCallLowering.h | 28 unsigned lowerParameterPtr(MachineIRBuilder &MIRBuilder, Type *ParamTy,
31 void lowerParameter(MachineIRBuilder &MIRBuilder, Type *ParamTy,
40 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 32 bool AArch64CallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() argument
34 MachineInstr *Return = MIRBuilder.buildInstr(AArch64::RET_ReallyLR); in lowerReturn()
44 MIRBuilder.setInstr(*Return, /* Before */ true); in lowerReturn()
46 MIRBuilder.buildInstr(TargetOpcode::COPY, ResReg, VReg); in lowerReturn()
50 MachineInstrBuilder(MIRBuilder.getMF(), Return) in lowerReturn()
57 MachineIRBuilder &MIRBuilder, const Function::ArgumentListType &Args, in lowerFormalArguments() argument
59 MachineFunction &MF = MIRBuilder.getMF(); in lowerFormalArguments()
84 MIRBuilder.getMBB().addLiveIn(VA.getLocReg()); in lowerFormalArguments()
85 MIRBuilder.buildInstr(TargetOpcode::COPY, VRegs[i], VA.getLocReg()); in lowerFormalArguments()
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| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | IRTranslator.cpp | 57 MachineFunction &MF = MIRBuilder.getMF(); in getOrCreateBB()
72 MIRBuilder.buildInstr(Opcode, Inst.getType(), Res, Op0, Op1); in translateBinaryOp()
82 return CLI->lowerReturn(MIRBuilder, Ret, !Ret ? 0 : getOrCreateVReg(*Ret)); in translateReturn()
91 MIRBuilder.buildInstr(TargetOpcode::G_BR, BrTgt.getType(), TgtBB); in translateBr()
96 MachineBasicBlock &CurBB = MIRBuilder.getMBB(); in translateBr()
103 MIRBuilder.setDebugLoc(Inst.getDebugLoc()); in translate()
132 MIRBuilder.setMF(MF); in runOnMachineFunction()
136 MIRBuilder.setMBB(MBB); in runOnMachineFunction()
141 CLI->lowerFormalArguments(MIRBuilder, F.getArgumentList(), VRegArgs); in runOnMachineFunction()
149 MIRBuilder.setMBB(MBB); in runOnMachineFunction()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 32 bool AMDGPUCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() argument
38 MachineIRBuilder &MIRBuilder, const Function::ArgumentListType &Args, in lowerFormalArguments() argument
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| D | AMDGPUCallLowering.h | 31 lowerFormalArguments(MachineIRBuilder &MIRBuilder,
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| /external/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | CallLowering.h | 49 virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, in lowerReturn() argument
64 lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments() argument
|