Searched refs:MMDC0 (Results 1 – 10 of 10) sorted by relevance
| /external/u-boot/arch/arm/include/asm/arch-s32v234/ |
| D | mmdc.h | 9 #define MMDC0 0 macro
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| /external/u-boot/board/aristainetos/ |
| D | nt5cc256m16cp.cfg | 34 /* in DDR3, 64-bit mode, only MMDC0 is initiated */
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| D | mt41j128M.cfg | 36 /* in DDR3, 64-bit mode, only MMDC0 is initiated */
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| /external/u-boot/board/freescale/s32v234evb/ |
| D | lpddr2.c | 106 case MMDC0: in config_mmdc()
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| /external/u-boot/board/samtec/vining_2000/ |
| D | imximage.cfg | 104 /* MMDC init - DDR3, 64-bit mode, only MMDC0 is initiated */
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| /external/u-boot/board/freescale/mx6sxsabresd/ |
| D | imximage.cfg | 104 /* MMDC init - DDR3, 64-bit mode, only MMDC0 is initiated */
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| /external/u-boot/board/freescale/mx6sxsabreauto/ |
| D | imximage.cfg | 106 /* MMDC init - DDR3, 64-bit mode, only MMDC0 is initiated */
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| /external/u-boot/board/freescale/mx6qarm2/ |
| D | imximage_mx6dl.cfg | 130 * MMDC channels: Both MMDC0, MMDC1
195 * b. The calibration code that runs for both MMDC0 & MMDC1 should be used.
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| /external/u-boot/board/seco/mx6quq7/ |
| D | mx6quq7-2g.cfg | 115 * in DDR3, 64-bit mode, only MMDC0 is init
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| /external/u-boot/arch/arm/dts/ |
| D | imx6qdl.dtsi | 1085 mmdc0: mmdc@021b0000 { /* MMDC0 */
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