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Searched refs:MOVW (Results 1 – 25 of 38) sorted by relevance

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/external/boringssl/src/ssl/test/runner/poly1305/
Dsum_arm.s30 MOVW $·poly1305_init_constants_armv6<>(SB), R7
31 MOVW R2, R8
32 MOVW R2>>26, R9
33 MOVW R3>>20, g
34 MOVW R4>>14, R11
35 MOVW R5>>8, R12
77 MOVW R0, 88(R13)
78 MOVW R1, 92(R13)
79 MOVW R2, 96(R13)
80 MOVW R1, R14
[all …]
/external/syzkaller/vendor/golang.org/x/sys/unix/
Dasm_linux_arm.s24 MOVW trap+0(FP), R7
25 MOVW a1+4(FP), R0
26 MOVW a2+8(FP), R1
27 MOVW a3+12(FP), R2
28 MOVW $0, R3
29 MOVW $0, R4
30 MOVW $0, R5
32 MOVW R0, r1+16(FP)
33 MOVW $0, R0
34 MOVW R0, r2+20(FP)
[all …]
Dasm_linux_mipsx.s29 MOVW a1+4(FP), R4
30 MOVW a2+8(FP), R5
31 MOVW a3+12(FP), R6
32 MOVW R0, R7
33 MOVW trap+0(FP), R2 // syscall entry
35 MOVW R2, r1+16(FP) // r1
36 MOVW R3, r2+20(FP) // r2
47 MOVW a1+4(FP), R4
48 MOVW a2+8(FP), R5
49 MOVW a3+12(FP), R6
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dexecute-only-big-stack-frame.ll4 ; RUN: | FileCheck --check-prefix=CHECK-MOVW-MOVT-ADD %s
20 ; CHECK-MOVW-MOVT-ADD-LABEL: test_big_stack_frame:
21 ; CHECK-MOVW-MOVT-ADD-NOT: ldr {{r[0-9]+}}, .{{.*}}
22 ; CHECK-MOVW-MOVT-ADD: movw [[REG1:r[0-9]+]], #0
23 ; CHECK-MOVW-MOVT-ADD: movt [[REG1]], #65535
24 ; CHECK-MOVW-MOVT-ADD: add sp, [[REG1]]
25 ; CHECK-MOVW-MOVT-ADD-NOT: ldr {{r[0-9]+}}, .{{.*}}
26 ; CHECK-MOVW-MOVT-ADD: movw [[REG2:r[0-9]+]], #65532
27 ; CHECK-MOVW-MOVT-ADD: movt [[REG2]], #0
28 ; CHECK-MOVW-MOVT-ADD: add [[REG2]], sp
[all …]
Dminsize-litpools.ll5 ; make use of it in deciding whether to use MOVW/MOVT for global variables or a
/external/libxaac/decoder/armv7/
Dixheaacd_fft_15_ld.s30 MOVW r10, #0xB000
41 MOVW r10, #0x9D84
55 MOVW r10, #0xD180
64 MOVW r10, #0xB000
76 MOVW r10, #0x9D84
91 MOVW r10, #0xD180
110 MOVW r1, #0xFA00
129 MOVW r10, #0xB000
140 MOVW r10, #0x9D84
154 MOVW r10, #0xD180
[all …]
Dixheaacd_apply_rot.s28 MOVW R5, #0x59e
73 MOVW R4, #0x53C
119 MOVW R11, #0x6c2
120 MOVW R5, #0x564
Dixheaacd_conv_ergtoamplitude.s31 MOVW R14, #0x1FF
32 MOVW R10, #0x5A82
Dixheaacd_conv_ergtoamplitudelp.s31 MOVW R11, #0x5A82
32 MOVW R10, #0x1FF
Dixheaacd_imdct_using_fft.s36 MOVW r8, #11600
38 MOVW r8, #11856
40 MOVW r8, #11920
42 MOVW r8, #11936
281 MOVW r14, #0x5a82
618 MOVW r14, #8528
Dixheaacd_esbr_fwd_modulation.s66 MOVW R5, #0x41FC
Dixheaacd_post_twiddle.s35 MOVW R6, #7500
46 MOVW R4, #0x192
47 MOVW R5, #0xfe6e
Dixheaacd_inv_dit_fft_8pt.s117 MOVW r11, #0x00005a82
Dixheaacd_fft32x32_ld2_armv7.s201 MOVW r11, 0X7642
203 MOVW r12, 0X30FC
205 MOVW r14, 0X5A83
Dixheaacd_pre_twiddle_compute.s31 MOVW R8, #7500
Dixheaacd_complex_fft_p2.s23 MOVW r4, #0x3333
25 MOVW r5, #0x0F0F
/external/libhevc/decoder/arm/
Dihevcd_fmt_conv_420sp_to_rgba8888.s117 MOVW R10,#0x3311
120 MOVW R10,#0xF379
123 MOVW R10,#0xE5F8
126 MOVW R10,#0x4092
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AVR/features/
Davr25.ll3 ; On most cores, the 16-bit 'MOVW' instruction can be used
/external/llvm/test/CodeGen/ARM/
Dminsize-litpools.ll5 ; make use of it in deciding whether to use MOVW/MOVT for global variables or a
/external/vixl/test/aarch32/config/
Dcond-rd-operand-imm16-t32.json34 "Movw" // MOVW{<c>}{<q>} <Rd>, #<imm16> ; T3
/external/pcre/dist2/src/sljit/
DsljitNativeARM_32.c129 #define MOVW 0xe3000000 macro
398 FAIL_IF(push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff))); in emit_imm()
512 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT); in inline_set_jump_addr()
513 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_addr << 4) & 0xf0000) | (new_addr & 0xfff); in inline_set_jump_addr()
567 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT); in inline_set_const()
568 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_constant << 4) & 0xf0000) | (new_constant & 0xfff); in inline_set_const()
1307 return push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff)); in load_immediate()
1327 FAIL_IF(push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff))); in load_immediate()
2522 …FAIL_IF(push_inst(compiler, (MOVW & ~COND_MASK) | cc | RD(dst_reg) | ((tmp << 4) & 0xf0000) | (tmp… in sljit_emit_cmov()
DsljitNativeARM_T2_32.c142 #define MOVW 0xf2400000 macro
224 FAIL_IF(push_inst32(compiler, MOVW | RD4(dst) in emit_imm32_const()
233 …SLJIT_ASSERT(((inst[0] & 0xfbf0) == (MOVW >> 16)) && ((inst[2] & 0xfbf0) == (MOVT >> 16)) && dst =… in modify_imm32_const()
234 inst[0] = (MOVW >> 16) | COPY_BITS(new_imm, 12, 0, 4) | COPY_BITS(new_imm, 11, 10, 1); in modify_imm32_const()
539 FAIL_IF(push_inst32(compiler, MOVW | RD4(dst) in load_immediate()
2211 return push_inst32(compiler, MOVW | RD4(dst_reg) in sljit_emit_cmov()
2230 FAIL_IF(push_inst32(compiler, MOVW | RD4(dst_reg) in sljit_emit_cmov()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/
DAVRDevices.td65 // The device supports the 16-bit GPR pair MOVW instruction.
67 "The device supports the 16-bit MOVW "
/external/llvm/lib/Target/AVR/
DAVR.td83 // The device supports the 16-bit GPR pair MOVW instruction.
85 "The device supports the 16-bit MOVW "
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Ddiagnostics.s97 @ Invalid 's' bit usage for MOVW

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