Searched refs:MOV_S (Results 1 – 11 of 11) sorted by relevance
/external/v8/src/compiler/mips64/ |
D | instruction-scheduler-mips64.cc | 408 MOV_S = 4, enumerator 1044 return Latency::MFC1 + 1 + Latency::BRANCH + Latency::MOV_S + 4 + in Float32RoundLatency() 1057 Latency::MFC1 + 1 + Latency::MOV_S; in Float32MaxLatency() 1079 Latency::MFC1 + 1 + Latency::MOV_S; in Float32MinLatency() 1114 3 * Latency::DMFC1 + OrLatency() + Latency::MTC1 + Latency::MOV_S + in TruncUlSLatency()
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/external/pcre/dist2/src/sljit/ |
D | sljitNativeMIPS_64.c | 576 ins = MOV_S | FMT_S | FS(float_arg_count) | FD(arg_count); in call_with_args() 578 ins = MOV_S | FMT_S | FS(SLJIT_FR0) | FD(TMP_FREG1); in call_with_args() 584 ins = MOV_S | FMT_D | FS(float_arg_count) | FD(arg_count); in call_with_args() 586 ins = MOV_S | FMT_D | FS(SLJIT_FR0) | FD(TMP_FREG1); in call_with_args()
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D | sljitNativeMIPS_32.c | 544 ins = MOV_S | FMT_S | FS(SLJIT_FR0) | FD(TMP_FREG1); in call_with_args() 551 ins = MOV_S | FMT_D | FS(SLJIT_FR0) | FD(TMP_FREG1); in call_with_args()
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D | sljitNativeMIPS_common.c | 161 #define MOV_S (HI(17) | FMT_S | LO(6)) macro 1442 FAIL_IF(push_inst(compiler, MOV_S | FMT(op) | FS(src) | FD(dst_r), MOVABLE_INS)); in sljit_emit_fop1()
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/external/v8/src/compiler/mips/ |
D | instruction-scheduler-mips.cc | 375 MOV_S = 4, enumerator 672 return Latency::MFC1 + ExtLatency() + Latency::BRANCH + Latency::MOV_S + 4 + in Float32RoundLatency() 1098 return Latency::MOV_S; // Estimated max. in Move_sLatency()
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/external/v8/src/mips/ |
D | constants-mips.h | 606 MOV_S = ((0U << 3) + 6), enumerator
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D | assembler-mips.cc | 2844 GenInstrRegister(COP1, S, f0, fs, fd, MOV_S); in mov_s()
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D | simulator-mips.cc | 3242 case MOV_S: in DecodeTypeRegisterSRsType()
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/external/v8/src/mips64/ |
D | constants-mips64.h | 637 MOV_S = ((0U << 3) + 6), enumerator
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D | assembler-mips64.cc | 3240 GenInstrRegister(COP1, S, f0, fs, fd, MOV_S); in mov_s()
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D | simulator-mips64.cc | 2695 case MOV_S: in DecodeTypeRegisterSRsType()
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