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Searched refs:MTRR_PHYS_MASK_MSR (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/cmd/x86/
Dmtrr.c32 mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in do_mtrr_list()
69 valid = native_read_msr(MTRR_PHYS_MASK_MSR(reg)) & MTRR_PHYS_MASK_VALID; in do_mtrr_set()
78 wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); in do_mtrr_set()
90 mask = native_read_msr(MTRR_PHYS_MASK_MSR(reg)); in mtrr_set_valid()
95 wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); in mtrr_set_valid()
/external/u-boot/arch/x86/cpu/intel_common/
Dcar.S22 #define MTRR_PHYS_MASK_MSR(reg) (0x200 + 2 * (reg) + 1) macro
88 movl $(MTRR_PHYS_MASK_MSR(0)), %ecx
141 movl $MTRR_PHYS_MASK_MSR(1), %ecx
153 movl $MTRR_PHYS_MASK_MSR(2), %ecx
208 movl $MTRR_PHYS_MASK_MSR(2), %ecx
/external/u-boot/arch/x86/cpu/
Dmtrr.c61 wrmsrl(MTRR_PHYS_MASK_MSR(i), mask | MTRR_PHYS_MASK_VALID); in mtrr_commit()
66 wrmsrl(MTRR_PHYS_MASK_MSR(i), 0); in mtrr_commit()
Dmp_init.c208 msr_entry = save_msr(MTRR_PHYS_MASK_MSR(i), msr_entry); in save_bsp_msrs()
/external/u-boot/arch/x86/cpu/coreboot/
Dcoreboot.c59 wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0); in board_final_cleanup()
/external/u-boot/arch/x86/include/asm/
Dmtrr.h32 #define MTRR_PHYS_MASK_MSR(reg) (0x200 + 2 * (reg) + 1) macro