Searched refs:MXC_CCM_CCGR3_LDB_DI0_MASK (Results 1 – 15 of 15) sorted by relevance
341 reg &= ~MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()356 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()
330 clrbits_le32(&ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()343 setbits_le32(&ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()
151 reg |= (MXC_CCM_CCGR3_LDB_DI0_MASK | 0xffff); in setup_display()
394 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display_clock()
474 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display_b850v3()520 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display_bx50v3()
470 MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()
411 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()
502 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK; in setup_display()
520 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK; in setup_display()
580 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()
764 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()
636 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK | in setup_display()
820 #define MXC_CCM_CCGR3_LDB_DI0_MASK (3 << MXC_CCM_CCGR3_LDB_DI0_OFFSET) macro
702 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()
440 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; in setup_display()