Searched refs:MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET (Results 1 – 13 of 13) sorted by relevance
158 reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | in setup_display()
445 reg |= (0 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) in enable_lvds()533 reg |= (0 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) in enable_spi_display()
399 (0 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)); in setup_display_clock()
1436 | (7 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)); in select_ldb_di_clock_source()1444 | (4 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)); in select_ldb_di_clock_source()1452 | (clk << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)); in select_ldb_di_clock_source()
475 (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)); in setup_display()
509 reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) in setup_display()
527 reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | in setup_display()
587 reg |= (3<<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) in setup_display()
771 reg |= (3<<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) in setup_display()
643 reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | in setup_display()
449 #define MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET 9 macro
709 reg |= (3<<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) in setup_display()
447 reg |= (3<<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) in setup_display()