Searched refs:MaskReg (Results 1 – 6 of 6) sorted by relevance
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 93 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask() argument
99 MaskInst.addOperand(MCOperand::createReg(MaskReg)); in emitMask()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 102 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask() argument
108 MaskInst.addOperand(MCOperand::createReg(MaskReg)); in emitMask()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 4754 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
4813 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitPartwordAtomicBinary()
4823 .addReg(TmpDestReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
4825 .addReg(TmpReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
5079 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
5148 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitInstrWithCustomInserter()
5151 .addReg(NewVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
5153 .addReg(OldVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
5159 .addReg(TmpDestReg).addReg(MaskReg); in EmitInstrWithCustomInserter()
5169 .addReg(TmpDestReg).addReg(MaskReg); in EmitInstrWithCustomInserter()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 8545 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
8604 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitPartwordAtomicBinary()
8614 .addReg(TmpDestReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
8616 .addReg(TmpReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
9263 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
9332 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitInstrWithCustomInserter()
9335 .addReg(NewVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
9337 .addReg(OldVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
9343 .addReg(TmpDestReg).addReg(MaskReg); in EmitInstrWithCustomInserter()
9353 .addReg(TmpDestReg).addReg(MaskReg); in EmitInstrWithCustomInserter()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9842 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
9902 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitPartwordAtomicBinary()
9912 .addReg(TmpDestReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
9914 .addReg(TmpReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
9920 .addReg(TmpDestReg).addReg(MaskReg); in EmitPartwordAtomicBinary()
10632 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
10702 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg) in EmitInstrWithCustomInserter()
10705 .addReg(NewVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
10707 .addReg(OldVal2Reg).addReg(MaskReg); in EmitInstrWithCustomInserter()
10713 .addReg(TmpDestReg).addReg(MaskReg); in EmitInstrWithCustomInserter()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 4234 unsigned MaskReg = MIB->getOperand(1).getReg(); in expandPostRAPseudo() local
4242 MIB.addReg(Reg, RegState::Undef).addReg(MaskReg, MaskState) in expandPostRAPseudo()
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