Searched refs:OP0 (Results 1 – 8 of 8) sorted by relevance
/external/llvm/test/CodeGen/Hexagon/ |
D | hwloop4.ll | 5 ; CHECK: [[OP0:r[0-9]+]] = add([[OP1:r[0-9]+]], #-[[OP2:[0-9]+]] 6 ; CHECK-NOT: add([[OP0]], #[[OP2]])
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
D | hwloop4.ll | 5 ; CHECK: [[OP0:r[0-9]+]] = add([[OP1:r[0-9]+]],#-[[OP2:[0-9]+]] 6 ; CHECK-NOT: add([[OP0]],#[[OP2]])
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/external/kernel-headers/original/uapi/asm-arm64/asm/ |
D | kvm.h | 205 ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | opt-sgpr-to-vgpr-copy.mir | 20 # GCN: %[[OP0:[0-9]+]]:vreg_64 = REG_SEQUENCE killed %{{[0-9]+}}, %subreg.sub0, killed %{{[0-… 21 # GCN-NEXT: V_CMP_LT_U32_e64 killed %[[OP0]].sub0, 12, implicit $exec
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelDAGToDAG.cpp | 657 SDValue OP0; in SelectMul() local 668 OP0 = Sext0; in SelectMul() 680 OP0 = SDValue(CurDAG->getMachineNode(Hexagon::L2_loadri_io, dl, MVT::i32, in SelectMul() 720 OP0, OP1); in SelectMul()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ |
D | README.txt | 2142 errs() << "OP0 = " << *Op0 << " U=" << Op0->getNumUses() << "\n";
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/external/swiftshader/third_party/LLVM/lib/Target/ |
D | README.txt | 2223 errs() << "OP0 = " << *Op0 << " U=" << Op0->getNumUses() << "\n";
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/external/llvm/lib/Target/ |
D | README.txt | 2142 errs() << "OP0 = " << *Op0 << " U=" << Op0->getNumUses() << "\n";
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