Searched refs:OPC_RecordChild4 (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGISel.h | 110 OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7, enumerator
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | SelectionDAGISel.h | 106 OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7, enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGISel.h | 123 OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7, enumerator
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGISel.cpp | 2207 case OPC_RecordChild4: case OPC_RecordChild5: in SelectCodeCommon()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGISel.cpp | 2929 case OPC_RecordChild4: case OPC_RecordChild5: in SelectCodeCommon()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGISel.cpp | 3085 case OPC_RecordChild4: case OPC_RecordChild5: in SelectCodeCommon()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenDAGISel.inc | 10025 /* 21345*/ OPC_RecordChild4, // #3 = $CRd
10082 /* 21457*/ OPC_RecordChild4, // #3 = $CRd
10137 /* 21561*/ OPC_RecordChild4, // #3 = $addr
10174 /* 21638*/ OPC_RecordChild4, // #3 = $addr
10211 /* 21715*/ OPC_RecordChild4, // #3 = $addr
10246 /* 21784*/ OPC_RecordChild4, // #3 = $addr
10281 /* 21853*/ OPC_RecordChild4, // #3 = $addr
10318 /* 21930*/ OPC_RecordChild4, // #3 = $addr
10355 /* 22007*/ OPC_RecordChild4, // #3 = $addr
10390 /* 22076*/ OPC_RecordChild4, // #3 = $addr
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenDAGISel.inc | 7791 /*16939*/ OPC_RecordChild4, // #4 = physreg input EDX
7821 /*17015*/ OPC_RecordChild4, // #3 = physreg input EDX
7861 /*17094*/ OPC_RecordChild4, // #4 = physreg input EDX
7891 /*17170*/ OPC_RecordChild4, // #3 = physreg input EDX
7931 /*17249*/ OPC_RecordChild4, // #4 = physreg input EDX
7961 /*17325*/ OPC_RecordChild4, // #3 = physreg input EDX
8001 /*17404*/ OPC_RecordChild4, // #4 = physreg input EDX
8031 /*17480*/ OPC_RecordChild4, // #3 = physreg input EDX
8071 /*17559*/ OPC_RecordChild4, // #4 = physreg input EDX
8101 /*17635*/ OPC_RecordChild4, // #3 = physreg input EDX
[all …]
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenDAGISel.inc | 10618 /* 20187*/ OPC_RecordChild4, // #3 = $idx2
10639 /* 20225*/ OPC_RecordChild4, // #3 = $idx2
10660 /* 20263*/ OPC_RecordChild4, // #3 = $idx2
10681 /* 20301*/ OPC_RecordChild4, // #3 = $idx2
27965 /* 53659*/ OPC_RecordChild4, // #4 = physreg input NZCV
27985 /* 53696*/ OPC_RecordChild4, // #4 = physreg input NZCV
28012 /* 53744*/ OPC_RecordChild4, // #4 = physreg input NZCV
28032 /* 53781*/ OPC_RecordChild4, // #4 = physreg input NZCV
28062 /* 53836*/ OPC_RecordChild4, // #4 = physreg input NZCV
28082 /* 53873*/ OPC_RecordChild4, // #4 = physreg input NZCV
[all …]
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