/external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
D | fd2_emit.c | 95 OUT_RING(ring, base); in emit_constants() 97 OUT_RING(ring, *(dwords++)); in emit_constants() 110 OUT_RING(ring, start_base + (4 * (shader->first_immediate + i))); in emit_constants() 111 OUT_RING(ring, shader->immediates[i].val[0]); in emit_constants() 112 OUT_RING(ring, shader->immediates[i].val[1]); in emit_constants() 113 OUT_RING(ring, shader->immediates[i].val[2]); in emit_constants() 114 OUT_RING(ring, shader->immediates[i].val[3]); in emit_constants() 140 OUT_RING(ring, 0x00010000 + (0x6 * const_idx)); in emit_texture() 142 OUT_RING(ring, sampler->tex0 | view->tex0); in emit_texture() 144 OUT_RING(ring, view->tex2); in emit_texture() [all …]
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D | fd2_gmem.c | 73 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_INFO)); in emit_gmem2mem_surf() 74 OUT_RING(ring, A2XX_RB_COLOR_INFO_SWAP(swap) | in emit_gmem2mem_surf() 79 OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL)); in emit_gmem2mem_surf() 80 OUT_RING(ring, 0x00000000); /* RB_COPY_CONTROL */ in emit_gmem2mem_surf() 82 OUT_RING(ring, rsc->slices[0].pitch >> 5); /* RB_COPY_DEST_PITCH */ in emit_gmem2mem_surf() 83 OUT_RING(ring, /* RB_COPY_DEST_INFO */ in emit_gmem2mem_surf() 95 OUT_RING(ring, CP_REG(REG_A2XX_VGT_MAX_VTX_INDX)); in emit_gmem2mem_surf() 96 OUT_RING(ring, 3); /* VGT_MAX_VTX_INDX */ in emit_gmem2mem_surf() 97 OUT_RING(ring, 0); /* VGT_MIN_VTX_INDX */ in emit_gmem2mem_surf() 116 OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_OFFSET)); in fd2_emit_tile_gmem2mem() [all …]
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D | fd2_draw.c | 52 OUT_RING(ring, CACHE_FLUSH); in emit_cacheflush() 94 OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET)); in fd2_draw_vbo() 95 OUT_RING(ring, info->start); in fd2_draw_vbo() 98 OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL)); in fd2_draw_vbo() 99 OUT_RING(ring, 0x0000003b); in fd2_draw_vbo() 102 OUT_RING(ring, A2XX_TC_CNTL_STATUS_L2_INVALIDATE); in fd2_draw_vbo() 107 OUT_RING(ring, CP_REG(REG_A2XX_VGT_MAX_VTX_INDX)); in fd2_draw_vbo() 108 OUT_RING(ring, info->max_index); /* VGT_MAX_VTX_INDX */ in fd2_draw_vbo() 109 OUT_RING(ring, info->min_index); /* VGT_MIN_VTX_INDX */ in fd2_draw_vbo() 115 OUT_RING(ring, CP_REG(REG_A2XX_UNKNOWN_2010)); in fd2_draw_vbo() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
D | fd5_emit.c | 72 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd5_emit_const() 81 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_const() 83 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_const() 87 OUT_RING(ring, dwords[i]); in fd5_emit_const() 101 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd5_emit_const_bo() 105 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_const_bo() 107 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_const_bo() 117 OUT_RING(ring, 0xbad00000 | (i << 16)); in fd5_emit_const_bo() 118 OUT_RING(ring, 0xbad00000 | (i << 16)); in fd5_emit_const_bo() 123 OUT_RING(ring, 0xffffffff); in fd5_emit_const_bo() [all …]
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D | fd5_gmem.c | 101 OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 106 OUT_RING(ring, A5XX_RB_MRT_PITCH(stride)); in emit_mrt() 107 OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(size)); in emit_mrt() 109 OUT_RING(ring, base); /* RB_MRT[i].BASE_LO */ in emit_mrt() 110 OUT_RING(ring, 0x00000000); /* RB_MRT[i].BASE_HI */ in emit_mrt() 117 OUT_RING(ring, A5XX_SP_FS_MRT_REG_COLOR_FORMAT(format) | in emit_mrt() 126 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_LO */ in emit_mrt() 127 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_HI */ in emit_mrt() 128 OUT_RING(ring, A5XX_RB_MRT_FLAG_BUFFER_PITCH(0)); in emit_mrt() 129 OUT_RING(ring, A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(0)); in emit_mrt() [all …]
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D | fd5_blitter.c | 156 OUT_RING(ring, LRZ_FLUSH); in emit_setup() 159 OUT_RING(ring, 0x0); in emit_setup() 162 OUT_RING(ring, 0x00000003); /* PC_POWER_CNTL */ in emit_setup() 165 OUT_RING(ring, 0x00000003); /* VFD_POWER_CNTL */ in emit_setup() 170 OUT_RING(ring, 0x10000000); /* RB_CCU_CNTL */ in emit_setup() 173 OUT_RING(ring, 0x00000008); in emit_setup() 176 OUT_RING(ring, 0x86000000); /* UNKNOWN_2100 */ in emit_setup() 179 OUT_RING(ring, 0x86000000); /* UNKNOWN_2180 */ in emit_setup() 182 OUT_RING(ring, 0x00000009); /* UNKNOWN_2184 */ in emit_setup() 185 OUT_RING(ring, A5XX_RB_CNTL_BYPASS); in emit_setup() [all …]
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D | fd5_compute.c | 70 OUT_RING(ring, 0x00000000); /* SP_SP_CNTL */ in cs_program_emit() 73 OUT_RING(ring, A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(TWO_QUADS) | in cs_program_emit() 78 OUT_RING(ring, A5XX_SP_CS_CTRL_REG0_THREADSIZE(thrsz) | in cs_program_emit() 85 OUT_RING(ring, A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET(0) | in cs_program_emit() 90 OUT_RING(ring, A5XX_HLSQ_CS_CNTL_INSTRLEN(v->instrlen) | in cs_program_emit() 94 OUT_RING(ring, A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET(0) | in cs_program_emit() 100 OUT_RING(ring, constlen); /* HLSQ_CS_CONSTLEN */ in cs_program_emit() 101 OUT_RING(ring, v->instrlen); /* HLSQ_CS_INSTRLEN */ in cs_program_emit() 107 OUT_RING(ring, 0x1f00000); in cs_program_emit() 114 OUT_RING(ring, A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID(work_group_id) | in cs_program_emit() [all …]
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D | fd5_image.c | 101 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(slot) | in emit_image_tex() 105 OUT_RING(ring, CP_LOAD_STATE4_1_STATE_TYPE(ST4_CONSTANTS) | in emit_image_tex() 107 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in emit_image_tex() 109 OUT_RING(ring, A5XX_TEX_CONST_0_FMT(img->fmt) | in emit_image_tex() 113 OUT_RING(ring, A5XX_TEX_CONST_1_WIDTH(img->width) | in emit_image_tex() 115 OUT_RING(ring, A5XX_TEX_CONST_2_FETCHSIZE(img->fetchsize) | in emit_image_tex() 118 OUT_RING(ring, A5XX_TEX_CONST_3_ARRAY_PITCH(img->array_pitch)); in emit_image_tex() 123 OUT_RING(ring, 0x00000000); in emit_image_tex() 124 OUT_RING(ring, A5XX_TEX_CONST_5_DEPTH(img->depth)); in emit_image_tex() 126 OUT_RING(ring, 0x00000000); in emit_image_tex() [all …]
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D | fd5_program.c | 106 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(0) | in fd5_emit_shader() 111 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_shader() 113 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_shader() 125 OUT_RING(ring, bin[i]); in fd5_emit_shader() 223 OUT_RING(ring, REG_A5XX_VPC_SO_BUF_CNTL); in emit_stream_out() 224 OUT_RING(ring, A5XX_VPC_SO_BUF_CNTL_ENABLE | in emit_stream_out() 229 OUT_RING(ring, REG_A5XX_VPC_SO_NCOMP(0)); in emit_stream_out() 230 OUT_RING(ring, ncomp[0]); in emit_stream_out() 231 OUT_RING(ring, REG_A5XX_VPC_SO_NCOMP(1)); in emit_stream_out() 232 OUT_RING(ring, ncomp[1]); in emit_stream_out() [all …]
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D | fd5_draw.c | 56 OUT_RING(ring, info->index_size ? info->index_bias : info->start); /* VFD_INDEX_OFFSET */ in draw_impl() 57 OUT_RING(ring, info->start_instance); /* VFD_INSTANCE_START_OFFSET */ in draw_impl() 60 OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */ in draw_impl() 162 OUT_RING(ring, FLUSH_SO_0 + i); in fd5_draw_vbo() 206 OUT_RING(ring, 0x10000000); in fd5_clear_lrz() 209 OUT_RING(ring, 0x20fffff); in fd5_clear_lrz() 212 OUT_RING(ring, A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(0.0)); in fd5_clear_lrz() 215 OUT_RING(ring, 0x00000000); in fd5_clear_lrz() 218 OUT_RING(ring, 0x00000181); in fd5_clear_lrz() 221 OUT_RING(ring, 0x00000000); in fd5_clear_lrz() [all …]
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D | fd5_emit.h | 105 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_LO */ in fd5_cache_flush() 106 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_HI */ in fd5_cache_flush() 107 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_LO */ in fd5_cache_flush() 108 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_HI */ in fd5_cache_flush() 109 OUT_RING(ring, 0x00000012); /* UCHE_CACHE_INVALIDATE */ in fd5_cache_flush() 120 OUT_RING(ring, CP_SET_RENDER_MODE_0_MODE(mode)); in fd5_set_render_mode() 121 OUT_RING(ring, 0x00000000); /* ADDR_LO */ in fd5_set_render_mode() 122 OUT_RING(ring, 0x00000000); /* ADDR_HI */ in fd5_set_render_mode() 123 OUT_RING(ring, COND(mode == GMEM, CP_SET_RENDER_MODE_3_GMEM_ENABLE) | in fd5_set_render_mode() 125 OUT_RING(ring, 0x00000000); in fd5_set_render_mode() [all …]
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D | fd5_query.c | 60 OUT_RING(ring, A5XX_RB_SAMPLE_COUNT_CONTROL_COPY); in occlusion_resume() 66 OUT_RING(ring, ZPASS_DONE); in occlusion_resume() 79 OUT_RING(ring, 0xffffffff); in occlusion_pause() 80 OUT_RING(ring, 0xffffffff); in occlusion_pause() 85 OUT_RING(ring, A5XX_RB_SAMPLE_COUNT_CONTROL_COPY); in occlusion_pause() 91 OUT_RING(ring, ZPASS_DONE); in occlusion_pause() 95 OUT_RING(ring, 0x00000014); // XXX in occlusion_pause() 97 OUT_RING(ring, 0xffffffff); in occlusion_pause() 98 OUT_RING(ring, 0xffffffff); in occlusion_pause() 99 OUT_RING(ring, 0x00000010); // XXX in occlusion_pause() [all …]
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D | fd5_draw.h | 66 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode)); in fd5_draw() 68 OUT_RING(ring, instances); /* NumInstances */ in fd5_draw() 69 OUT_RING(ring, count); /* NumIndices */ in fd5_draw() 71 OUT_RING(ring, 0x0); /* XXX */ in fd5_draw() 73 OUT_RING (ring, idx_size); in fd5_draw() 109 OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indicies)); in fd5_draw_emit()
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/external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
D | fd4_emit.c | 72 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd4_emit_const() 81 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd4_emit_const() 86 OUT_RING(ring, dwords[i]); in fd4_emit_const() 100 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd4_emit_const_bo() 104 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd4_emit_const_bo() 115 OUT_RING(ring, 0xbad00000 | (i << 16)); in fd4_emit_const_bo() 120 OUT_RING(ring, 0xffffffff); in fd4_emit_const_bo() 147 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(0) | in emit_textures() 151 OUT_RING(ring, CP_LOAD_STATE4_1_STATE_TYPE(ST4_SHADER) | in emit_textures() 158 OUT_RING(ring, sampler->texsamp0); in emit_textures() [all …]
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D | fd4_gmem.c | 115 OUT_RING(ring, A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 121 OUT_RING(ring, base); in emit_mrt() 122 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(stride)); in emit_mrt() 129 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(0)); in emit_mrt() 173 OUT_RING(ring, A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) | in emit_gmem2mem_surf() 177 OUT_RING(ring, A4XX_RB_COPY_DEST_PITCH_PITCH(slice->pitch * rsc->cpp)); in emit_gmem2mem_surf() 178 OUT_RING(ring, A4XX_RB_COPY_DEST_INFO_TILE(TILE4_LINEAR) | in emit_gmem2mem_surf() 205 OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_NEVER)); in fd4_emit_tile_gmem2mem() 208 OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_NEVER) | in fd4_emit_tile_gmem2mem() 216 OUT_RING(ring, 0x00000000); /* RB_STENCIL_CONTROL2 */ in fd4_emit_tile_gmem2mem() [all …]
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D | fd4_program.c | 107 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(0) | in emit_shader() 112 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in emit_shader() 125 OUT_RING(ring, bin[i]); in emit_shader() 266 OUT_RING(ring, 0x00000003); in fd4_program_emit() 269 OUT_RING(ring, A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(fssz) | in fd4_program_emit() 278 OUT_RING(ring, A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(TWO_QUADS) | in fd4_program_emit() 282 OUT_RING(ring, A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(63) | in fd4_program_emit() 285 OUT_RING(ring, A4XX_HLSQ_CONTROL_3_REG_REGID(s[FS].v->pos_regid) | in fd4_program_emit() 287 OUT_RING(ring, 0x00fcfcfc); /* XXX HLSQ_CONTROL_4 */ in fd4_program_emit() 290 OUT_RING(ring, A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(s[VS].constlen) | in fd4_program_emit() [all …]
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D | fd4_query.c | 65 OUT_RING(ring, CP_REG(REG_A4XX_RB_SAMPLE_COUNT_CONTROL) | 0x80000000); in occlusion_get_sample() 66 OUT_RING(ring, HW_QUERY_BASE_REG); in occlusion_get_sample() 67 OUT_RING(ring, A4XX_RB_SAMPLE_COUNT_CONTROL_COPY | in occlusion_get_sample() 71 OUT_RING(ring, DRAW4(DI_PT_POINTLIST_PSIZE, DI_SRC_SEL_AUTO_INDEX, in occlusion_get_sample() 73 OUT_RING(ring, 1); /* NumInstances */ in occlusion_get_sample() 74 OUT_RING(ring, 0); /* NumIndices */ in occlusion_get_sample() 122 OUT_RING(ring, CP_ALWAYS_COUNT); in time_elapsed_enable() 168 OUT_RING(ring, CP_REG_TO_MEM_0_REG(REG_A4XX_RBBM_PERFCTR_CP_0_LO) | in time_elapsed_get_sample() 186 OUT_RING(ring, samp->offset); in time_elapsed_get_sample() 190 OUT_RING(ring, CP_REG_TO_MEM_0_REG(HW_QUERY_BASE_REG) | in time_elapsed_get_sample() [all …]
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D | fd4_draw.c | 58 OUT_RING(ring, info->index_size ? info->index_bias : info->start); /* VFD_INDEX_OFFSET */ in draw_impl() 59 OUT_RING(ring, info->start_instance); /* ??? UNKNOWN_2209 */ in draw_impl() 62 OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */ in draw_impl() 152 OUT_RING(ring, REG_A4XX_RB_RENDER_CONTROL); in fd4_draw_vbo() 153 OUT_RING(ring, ~A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE); in fd4_draw_vbo() 154 OUT_RING(ring, A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE); in fd4_draw_vbo() 162 OUT_RING(ring, REG_A4XX_RB_RENDER_CONTROL); in fd4_draw_vbo() 163 OUT_RING(ring, ~A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE); in fd4_draw_vbo() 164 OUT_RING(ring, 0); in fd4_draw_vbo()
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D | fd4_draw.h | 75 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode)); in fd4_draw() 77 OUT_RING(ring, instances); /* NumInstances */ in fd4_draw() 78 OUT_RING(ring, count); /* NumIndices */ in fd4_draw() 80 OUT_RING(ring, 0x0); /* XXX */ in fd4_draw() 82 OUT_RING (ring, idx_size); in fd4_draw() 128 OUT_RING(ring, A4XX_CP_DRAW_INDX_INDIRECT_2_INDX_SIZE( in fd4_draw_emit()
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/external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
D | fd3_gmem.c | 112 OUT_RING(ring, A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 118 OUT_RING(ring, A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(base)); in emit_mrt() 124 OUT_RING(ring, COND((i < nr_bufs) && bufs[i], in emit_mrt() 179 OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RESOLVE_PASS) | in emit_binning_workaround() 182 OUT_RING(ring, A3XX_RB_RENDER_CONTROL_BIN_WIDTH(32) | in emit_binning_workaround() 187 OUT_RING(ring, A3XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) | in emit_binning_workaround() 191 OUT_RING(ring, A3XX_RB_COPY_DEST_PITCH_PITCH(128)); in emit_binning_workaround() 192 OUT_RING(ring, A3XX_RB_COPY_DEST_INFO_TILE(LINEAR) | in emit_binning_workaround() 199 OUT_RING(ring, A3XX_GRAS_SC_CONTROL_RENDER_MODE(RB_RESOLVE_PASS) | in emit_binning_workaround() 207 OUT_RING(ring, A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(FOUR_QUADS) | in emit_binning_workaround() [all …]
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D | fd3_emit.c | 77 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) | in fd3_emit_const() 86 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in fd3_emit_const() 91 OUT_RING(ring, dwords[i]); in fd3_emit_const() 105 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) | in fd3_emit_const_bo() 109 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in fd3_emit_const_bo() 120 OUT_RING(ring, 0xbad00000 | (i << 16)); in fd3_emit_const_bo() 125 OUT_RING(ring, 0xffffffff); in fd3_emit_const_bo() 155 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(tex_off[sb]) | in emit_textures() 159 OUT_RING(ring, CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER) | in emit_textures() 167 OUT_RING(ring, sampler->texsamp0); in emit_textures() [all …]
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D | fd3_program.c | 128 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) | in emit_shader() 133 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in emit_shader() 140 OUT_RING(ring, bin[i]); in emit_shader() 232 OUT_RING(ring, A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(FOUR_QUADS) | in fd3_program_emit() 240 OUT_RING(ring, A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(TWO_QUADS) | in fd3_program_emit() 244 OUT_RING(ring, A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(31)); in fd3_program_emit() 245 OUT_RING(ring, A3XX_HLSQ_CONTROL_3_REG_REGID(fp->pos_regid)); in fd3_program_emit() 246 OUT_RING(ring, A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(vp->constlen) | in fd3_program_emit() 249 OUT_RING(ring, A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(fp->constlen) | in fd3_program_emit() 254 OUT_RING(ring, A3XX_SP_SP_CTRL_REG_CONSTMODE(constmode) | in fd3_program_emit() [all …]
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D | fd3_query.c | 58 OUT_RING(ring, CP_REG(REG_A3XX_RB_SAMPLE_COUNT_ADDR) | 0x80000000); in occlusion_get_sample() 59 OUT_RING(ring, HW_QUERY_BASE_REG); in occlusion_get_sample() 60 OUT_RING(ring, samp->offset); in occlusion_get_sample() 63 OUT_RING(ring, A3XX_RB_SAMPLE_COUNT_CONTROL_COPY); in occlusion_get_sample() 66 OUT_RING(ring, 0x00000000); in occlusion_get_sample() 67 OUT_RING(ring, DRAW(DI_PT_POINTLIST_PSIZE, DI_SRC_SEL_AUTO_INDEX, in occlusion_get_sample() 69 OUT_RING(ring, 0); /* NumIndices */ in occlusion_get_sample() 74 OUT_RING(ring, A3XX_RBBM_PERFCTR_CTL_ENABLE); in occlusion_get_sample() 77 OUT_RING(ring, A3XX_VBIF_PERF_CNT_EN_CNT0 | in occlusion_get_sample()
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/external/mesa3d/src/gallium/drivers/freedreno/ |
D | freedreno_draw.h | 65 OUT_RING(ring, 0x00000000); in fd_draw() 66 OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX, in fd_draw() 68 OUT_RING(ring, 0); /* NumIndices */ in fd_draw() 74 OUT_RING(ring, 0); in fd_draw() 78 OUT_RING(ring, 0x00000000); /* viz query info. */ in fd_draw() 86 OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances)); in fd_draw() 88 OUT_RING(ring, count); /* NumIndices */ in fd_draw() 91 OUT_RING (ring, idx_size); in fd_draw()
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D | freedreno_util.h | 189 OUT_RING(struct fd_ringbuffer *ring, uint32_t data) in OUT_RING() function 274 OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF)); in OUT_PKT0() 282 OUT_RING(ring, CP_TYPE2_PKT); in OUT_PKT2() 290 OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8)); in OUT_PKT3() 314 OUT_RING(ring, CP_TYPE4_PKT | cnt | in OUT_PKT4() 324 OUT_RING(ring, CP_TYPE7_PKT | cnt | in OUT_PKT7() 334 OUT_RING(ring, 0x00000000); in OUT_WFI() 363 OUT_RING(ring, dwords); in __OUT_IB() 388 OUT_RING(ring, dwords); in __OUT_IB5() 409 OUT_RING(ring, ++marker_cnt); in emit_marker() [all …]
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