Searched refs:OffReg (Results 1 – 9 of 9) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/AsmParser/ |
| D | MBlazeAsmParser.cpp | 101 unsigned OffReg; member
168 return Mem.OffReg; in getMemOffReg()
259 Op->Mem.OffReg = 0; in CreateMem()
269 Op->Mem.OffReg = Off; in CreateMem()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 151 SDValue &OffReg, SDValue &ShImm);
1253 SDValue &OffReg, SDValue &ShImm) { in SelectT2AddrModeSoReg() argument
1270 OffReg = N.getOperand(1); in SelectT2AddrModeSoReg()
1273 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(OffReg.getOpcode()); in SelectT2AddrModeSoReg()
1277 std::swap(Base, OffReg); in SelectT2AddrModeSoReg()
1283 if (ConstantSDNode *Sh = dyn_cast<ConstantSDNode>(OffReg.getOperand(1))) { in SelectT2AddrModeSoReg()
1285 if (ShAmt < 4 && isShifterOpProfitable(OffReg, ShOpcVal, ShAmt)) in SelectT2AddrModeSoReg()
1286 OffReg = OffReg.getOperand(0); in SelectT2AddrModeSoReg()
1295 if (OffReg.getOpcode() == ISD::MUL && N.hasOneUse()) { in SelectT2AddrModeSoReg()
1298 if (canExtractShiftFromMul(OffReg, 3, PowerOfTwo, NewMulConst)) { in SelectT2AddrModeSoReg()
[all …]
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| D | ARMBaseInstrInfo.cpp | 178 unsigned OffReg = Offset.getReg(); in convertToThreeAddress() local
186 if (OffReg == 0) { in convertToThreeAddress()
203 .addReg(OffReg) in convertToThreeAddress()
212 .addReg(OffReg) in convertToThreeAddress()
220 if (OffReg == 0) in convertToThreeAddress()
232 .addReg(OffReg) in convertToThreeAddress()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 173 SDValue &OffReg, SDValue &ShImm);
1379 SDValue &OffReg, SDValue &ShImm) { in SelectT2AddrModeSoReg() argument
1396 OffReg = N.getOperand(1); in SelectT2AddrModeSoReg()
1399 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(OffReg.getOpcode()); in SelectT2AddrModeSoReg()
1403 std::swap(Base, OffReg); in SelectT2AddrModeSoReg()
1409 if (ConstantSDNode *Sh = dyn_cast<ConstantSDNode>(OffReg.getOperand(1))) { in SelectT2AddrModeSoReg()
1411 if (ShAmt < 4 && isShifterOpProfitable(OffReg, ShOpcVal, ShAmt)) in SelectT2AddrModeSoReg()
1412 OffReg = OffReg.getOperand(0); in SelectT2AddrModeSoReg()
1421 if (OffReg.getOpcode() == ISD::MUL && N.hasOneUse()) { in SelectT2AddrModeSoReg()
1424 if (canExtractShiftFromMul(OffReg, 3, PowerOfTwo, NewMulConst)) { in SelectT2AddrModeSoReg()
[all …]
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| D | ARMBaseInstrInfo.cpp | 154 unsigned OffReg = Offset.getReg(); in convertToThreeAddress() local
162 if (OffReg == 0) { in convertToThreeAddress()
180 .addReg(OffReg) in convertToThreeAddress()
190 .addReg(OffReg) in convertToThreeAddress()
199 if (OffReg == 0) in convertToThreeAddress()
212 .addReg(OffReg) in convertToThreeAddress()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 181 SDValue &OffReg, SDValue &ShImm);
1274 SDValue &OffReg, SDValue &ShImm) { in SelectT2AddrModeSoReg() argument
1291 OffReg = N.getOperand(1); in SelectT2AddrModeSoReg()
1294 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(OffReg.getOpcode()); in SelectT2AddrModeSoReg()
1298 std::swap(Base, OffReg); in SelectT2AddrModeSoReg()
1304 if (ConstantSDNode *Sh = dyn_cast<ConstantSDNode>(OffReg.getOperand(1))) { in SelectT2AddrModeSoReg()
1306 if (ShAmt < 4 && isShifterOpProfitable(OffReg, ShOpcVal, ShAmt)) in SelectT2AddrModeSoReg()
1307 OffReg = OffReg.getOperand(0); in SelectT2AddrModeSoReg()
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| D | ARMBaseInstrInfo.cpp | 156 unsigned OffReg = Offset.getReg(); in convertToThreeAddress() local
166 if (OffReg == 0) { in convertToThreeAddress()
180 .addReg(BaseReg).addReg(OffReg).addReg(0).addImm(SOOpc) in convertToThreeAddress()
185 .addReg(BaseReg).addReg(OffReg) in convertToThreeAddress()
192 if (OffReg == 0) in convertToThreeAddress()
201 .addReg(BaseReg).addReg(OffReg) in convertToThreeAddress()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 935 auto OffReg = MCCFIInstruction::createOffset(FrameLabel, DwarfReg, in insertCFIInstructionsAt() local
938 .addCFIIndex(MF.addFrameInst(OffReg)); in insertCFIInstructionsAt()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 815 auto OffReg = MCCFIInstruction::createOffset(FrameLabel, DwarfReg, in insertCFIInstructionsAt() local
818 .addCFIIndex(MMI.addFrameInst(OffReg)); in insertCFIInstructionsAt()
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