Searched refs:OffsetIdx (Results 1 – 9 of 9) sorted by relevance
240 int OffsetIdx; in getLoadInfo() local251 OffsetIdx = -1; in getLoadInfo()271 OffsetIdx = -1; in getLoadInfo()293 OffsetIdx = -1; in getLoadInfo()368 OffsetIdx = -1; in getLoadInfo()376 OffsetIdx = 5; in getLoadInfo()396 OffsetIdx = 5; in getLoadInfo()418 OffsetIdx = 3; in getLoadInfo()493 OffsetIdx = 3; in getLoadInfo()561 OffsetIdx = 2; in getLoadInfo()[all …]
507 unsigned OffsetIdx = MI.getNumExplicitOperands() - 1; in fixupCalleeSaveRestoreStackOffset() local508 assert(MI.getOperand(OffsetIdx - 1).getReg() == AArch64::SP && in fixupCalleeSaveRestoreStackOffset()511 MachineOperand &OffsetOpnd = MI.getOperand(OffsetIdx); in fixupCalleeSaveRestoreStackOffset()
179 int OffsetIdx = AMDGPU::getNamedOperandIdx(I->getOpcode(), in findMatchingDSInst() local181 unsigned Offset0 = I->getOperand(OffsetIdx).getImm() & 0xffff; in findMatchingDSInst()182 unsigned Offset1 = MBBI->getOperand(OffsetIdx).getImm() & 0xffff; in findMatchingDSInst()
397 unsigned OffsetIdx = MI.getNumExplicitOperands() - 1; in fixupCalleeSaveRestoreStackOffset() local398 assert(MI.getOperand(OffsetIdx - 1).getReg() == AArch64::SP && in fixupCalleeSaveRestoreStackOffset()401 MachineOperand &OffsetOpnd = MI.getOperand(OffsetIdx); in fixupCalleeSaveRestoreStackOffset()
426 int OffsetIdx = AMDGPU::getNamedOperandIdx(CI.I->getOpcode(), in findMatchingInst() local428 CI.Offset0 = CI.I->getOperand(OffsetIdx).getImm(); in findMatchingInst()429 CI.Offset1 = MBBI->getOperand(OffsetIdx).getImm(); in findMatchingInst()
336 !55 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "OffsetIdx", file: !4, line: 1316, size:…
9827 unsigned OffsetIdx = 1; in CombineToPreIndexedLoadStore() local9828 if (OtherUses[i]->getOperand(OffsetIdx).getNode() == BasePtr.getNode()) in CombineToPreIndexedLoadStore()9829 OffsetIdx = 0; in CombineToPreIndexedLoadStore()9830 assert(OtherUses[i]->getOperand(!OffsetIdx).getNode() == in CombineToPreIndexedLoadStore()9845 cast<ConstantSDNode>(OtherUses[i]->getOperand(OffsetIdx)); in CombineToPreIndexedLoadStore()9850 X0 = (OtherUses[i]->getOpcode() == ISD::SUB && OffsetIdx == 1) ? -1 : 1; in CombineToPreIndexedLoadStore()9851 Y0 = (OtherUses[i]->getOpcode() == ISD::SUB && OffsetIdx == 0) ? -1 : 1; in CombineToPreIndexedLoadStore()
12376 unsigned OffsetIdx = 1; in CombineToPreIndexedLoadStore() local12377 if (OtherUses[i]->getOperand(OffsetIdx).getNode() == BasePtr.getNode()) in CombineToPreIndexedLoadStore()12378 OffsetIdx = 0; in CombineToPreIndexedLoadStore()12379 assert(OtherUses[i]->getOperand(!OffsetIdx).getNode() == in CombineToPreIndexedLoadStore()12394 cast<ConstantSDNode>(OtherUses[i]->getOperand(OffsetIdx)); in CombineToPreIndexedLoadStore()12399 X0 = (OtherUses[i]->getOpcode() == ISD::SUB && OffsetIdx == 1) ? -1 : 1; in CombineToPreIndexedLoadStore()12400 Y0 = (OtherUses[i]->getOpcode() == ISD::SUB && OffsetIdx == 0) ? -1 : 1; in CombineToPreIndexedLoadStore()
10865 if (const int OffsetIdx = BroadcastIdx % Scale) in lowerVectorShuffleAsTruncBroadcast() local10867 DAG.getConstant(OffsetIdx * EltSize, DL, MVT::i8)); in lowerVectorShuffleAsTruncBroadcast()