Searched refs:OpEntry (Results 1 – 6 of 6) sorted by relevance
756 SDValue &OpEntry = PromotedIntegers[Op]; in SetPromotedInteger() local757 assert(!OpEntry.getNode() && "Node is already promoted!"); in SetPromotedInteger()758 OpEntry = Result; in SetPromotedInteger()771 SDValue &OpEntry = SoftenedFloats[Op]; in SetSoftenedFloat() local775 assert((!OpEntry.getNode()|| in SetSoftenedFloat()779 OpEntry = Result; in SetSoftenedFloat()788 SDValue &OpEntry = PromotedFloats[Op]; in SetPromotedFloat() local789 assert(!OpEntry.getNode() && "Node is already promoted!"); in SetPromotedFloat()790 OpEntry = Result; in SetPromotedFloat()802 SDValue &OpEntry = ScalarizedVectors[Op]; in SetScalarizedVector() local[all …]
17 import android.app.AppOpsManager.OpEntry;179 List<OpEntry> opEntries = new ArrayList<>(); in getOpsForPackage()237 private static OpEntry toOpEntry(Integer op) { in toOpEntry()240 OpEntry.class, in toOpEntry()249 OpEntry.class, in toOpEntry()277 return new OpEntry(op, false, AppOpsManager.MODE_ALLOWED, accessTimes, in toOpEntry()
738 SDValue &OpEntry = PromotedIntegers[Op]; in SetPromotedInteger() local739 assert(OpEntry.getNode() == 0 && "Node is already promoted!"); in SetPromotedInteger()740 OpEntry = Result; in SetPromotedInteger()749 SDValue &OpEntry = SoftenedFloats[Op]; in SetSoftenedFloat() local750 assert(OpEntry.getNode() == 0 && "Node is already converted to integer!"); in SetSoftenedFloat()751 OpEntry = Result; in SetSoftenedFloat()759 SDValue &OpEntry = ScalarizedVectors[Op]; in SetScalarizedVector() local760 assert(OpEntry.getNode() == 0 && "Node is already scalarized!"); in SetScalarizedVector()761 OpEntry = Result; in SetScalarizedVector()853 SDValue &OpEntry = WidenedVectors[Op]; in SetWidenedVector() local[all …]
22 import android.app.AppOpsManager.OpEntry;226 for (OpEntry entry : pkgOp.getOps()) { in assertOps()
1856 const DivRemEntry::DivRemResult &OpEntry = TypeEntry.ResultTable[OpIndex]; in X86SelectDivRem() local1866 TII.get(OpEntry.OpCopy), TypeEntry.LowInReg).addReg(Op0Reg); in X86SelectDivRem()1868 if (OpEntry.OpSignExtend) { in X86SelectDivRem()1869 if (OpEntry.IsOpSigned) in X86SelectDivRem()1871 TII.get(OpEntry.OpSignExtend)); in X86SelectDivRem()1897 TII.get(OpEntry.OpDivRem)).addReg(Op1Reg); in X86SelectDivRem()1909 OpEntry.DivRemResultReg == X86::AH && Subtarget->is64Bit()) { in X86SelectDivRem()1927 .addReg(OpEntry.DivRemResultReg); in X86SelectDivRem()
1950 const DivRemEntry::DivRemResult &OpEntry = TypeEntry.ResultTable[OpIndex]; in X86SelectDivRem() local1960 TII.get(OpEntry.OpCopy), TypeEntry.LowInReg).addReg(Op0Reg); in X86SelectDivRem()1962 if (OpEntry.OpSignExtend) { in X86SelectDivRem()1963 if (OpEntry.IsOpSigned) in X86SelectDivRem()1965 TII.get(OpEntry.OpSignExtend)); in X86SelectDivRem()1991 TII.get(OpEntry.OpDivRem)).addReg(Op1Reg); in X86SelectDivRem()2003 OpEntry.DivRemResultReg == X86::AH && Subtarget->is64Bit()) { in X86SelectDivRem()2021 .addReg(OpEntry.DivRemResultReg); in X86SelectDivRem()