/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
D | AVRExpandPseudoInsts.cpp | 74 bool expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI); 141 expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI) { in expandArith() argument 153 buildMI(MBB, MBBI, OpLo) in expandArith() 327 unsigned OpLo, OpHi, DstLoReg, DstHiReg; in expand() local 335 OpLo = AVR::SBCIRdK; in expand() 339 auto MIBLO = buildMI(MBB, MBBI, OpLo) in expand() 390 unsigned OpLo, OpHi, DstLoReg, DstHiReg; in expand() local 395 OpLo = AVR::COMRd; in expand() 399 auto MIBLO = buildMI(MBB, MBBI, OpLo) in expand() 420 unsigned OpLo, OpHi, SrcLoReg, SrcHiReg, DstLoReg, DstHiReg; in expand() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 1074 SDValue OpLo = Op; in SplitVecRes_StrictFPOp() local 1082 GetSplitVector(Op, OpLo, OpHi); in SplitVecRes_StrictFPOp() 1084 std::tie(OpLo, OpHi) = DAG.SplitVectorOperand(N, i); in SplitVecRes_StrictFPOp() 1087 OpsLo.push_back(OpLo); in SplitVecRes_StrictFPOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonConstPropagation.cpp | 1951 const MachineOperand &OpLo = LoIs1 ? MI.getOperand(1) : MI.getOperand(3); in evaluate() local 1954 Register SrcRL(OpLo), SrcRH(OpHi); in evaluate()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 16932 SDValue OpLo = getUnpackl(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef); in LowerAVXExtend() local 16938 OpLo = DAG.getBitcast(HVT, OpLo); in LowerAVXExtend() 16941 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerAVXExtend() 17268 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In, in LowerTRUNCATE() local 17272 OpLo = DAG.getBitcast(MVT::v4i32, OpLo); in LowerTRUNCATE() 17275 return DAG.getVectorShuffle(VT, DL, OpLo, OpHi, ShufMask); in LowerTRUNCATE() 17298 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i32, In, in LowerTRUNCATE() local 17304 OpLo = DAG.getBitcast(MVT::v16i8, OpLo); in LowerTRUNCATE() 17311 OpLo = DAG.getVectorShuffle(MVT::v16i8, DL, OpLo, OpLo, ShufMask1); in LowerTRUNCATE() 17314 OpLo = DAG.getBitcast(MVT::v4i32, OpLo); in LowerTRUNCATE() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 3558 SDValue OpLo = DAG.getNode(Opc, SL, Lo.getValueType(), Lo, in splitUnaryVectorOp() local 3563 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitUnaryVectorOp() 3581 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, in splitBinaryVectorOp() local 3586 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitBinaryVectorOp()
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