/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGFast.cpp | 686 SDNode *OpN = Op.getNode(); in ScheduleNode() local 690 GluedOpN = OpN; in ScheduleNode() 691 assert(OpN->getNodeId() != 0 && "Glue operand not ready?"); in ScheduleNode() 692 OpN->setNodeId(0); in ScheduleNode() 693 ScheduleNode(OpN); in ScheduleNode() 697 if (OpN == GluedOpN) in ScheduleNode() 701 DenseMap<SDNode*, SDNode*>::iterator DI = GluedMap.find(OpN); in ScheduleNode() 704 OpN = DI->second; in ScheduleNode() 706 unsigned Degree = OpN->getNodeId(); in ScheduleNode() 708 OpN->setNodeId(--Degree); in ScheduleNode() [all …]
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D | ScheduleDAGSDNodes.cpp | 456 SDNode *OpN = N->getOperand(i).getNode(); in AddSchedEdges() local 457 if (isPassiveNode(OpN)) continue; // Not scheduled. in AddSchedEdges() 458 SUnit *OpSU = &SUnits[OpN->getNodeId()]; in AddSchedEdges() 469 CheckForPhysRegDependency(OpN, N, i, TRI, TII, PhysReg, Cost); in AddSchedEdges() 483 if(isChain && OpN->getOpcode() == ISD::TokenFactor) in AddSchedEdges() 490 computeOperandLatency(OpN, N, i, Dep); in AddSchedEdges()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGFast.cpp | 679 SDNode *OpN = Op.getNode(); in ScheduleNode() local 683 GluedOpN = OpN; in ScheduleNode() 684 assert(OpN->getNodeId() != 0 && "Glue operand not ready?"); in ScheduleNode() 685 OpN->setNodeId(0); in ScheduleNode() 686 ScheduleNode(OpN); in ScheduleNode() 690 if (OpN == GluedOpN) in ScheduleNode() 694 DenseMap<SDNode*, SDNode*>::iterator DI = GluedMap.find(OpN); in ScheduleNode() 697 OpN = DI->second; in ScheduleNode() 699 unsigned Degree = OpN->getNodeId(); in ScheduleNode() 701 OpN->setNodeId(--Degree); in ScheduleNode() [all …]
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D | ScheduleDAGSDNodes.cpp | 457 SDNode *OpN = N->getOperand(i).getNode(); in AddSchedEdges() local 458 if (isPassiveNode(OpN)) continue; // Not scheduled. in AddSchedEdges() 459 SUnit *OpSU = &SUnits[OpN->getNodeId()]; in AddSchedEdges() 470 CheckForPhysRegDependency(OpN, N, i, TRI, TII, PhysReg, Cost); in AddSchedEdges() 484 if(isChain && OpN->getOpcode() == ISD::TokenFactor) in AddSchedEdges() 491 computeOperandLatency(OpN, N, i, Dep); in AddSchedEdges()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | RDFGraph.cpp | 1309 for (unsigned OpN = 0; OpN < NumOps; ++OpN) { in buildStmt() local 1310 MachineOperand &Op = In.getOperand(OpN); in buildStmt() 1317 if (TOI.isPreserving(In, OpN)) { in buildStmt() 1323 if (TOI.isClobbering(In, OpN)) in buildStmt() 1325 if (TOI.isFixedReg(In, OpN)) in buildStmt() 1337 for (unsigned OpN = 0; OpN < NumOps; ++OpN) { in buildStmt() local 1338 MachineOperand &Op = In.getOperand(OpN); in buildStmt() 1354 for (unsigned OpN = 0; OpN < NumOps; ++OpN) { in buildStmt() local 1355 MachineOperand &Op = In.getOperand(OpN); in buildStmt() 1363 if (TOI.isPreserving(In, OpN)) { in buildStmt() [all …]
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D | HexagonBitSimplify.cpp | 223 static bool getUsedBits(unsigned Opc, unsigned OpN, BitVector &Bits, 624 bool HexagonBitSimplify::getUsedBits(unsigned Opc, unsigned OpN, in getUsedBits() argument 630 if (OpN == D.getNumOperands()-1) in getUsedBits() 642 if (OpN == 1) { in getUsedBits() 655 if (OpN == 1) { in getUsedBits() 663 if (OpN == 1) { in getUsedBits() 673 if (OpN == 1) { in getUsedBits() 728 if (OpN == 1 || OpN == 2) { in getUsedBits() 781 if (OpN == 1) { in getUsedBits() 785 if (OpN == 2) { in getUsedBits() [all …]
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D | HexagonISelDAGToDAGHVX.cpp | 620 bool isValid() const { return isValue() || !(OpN & Invalid); } in isValid() 626 return OpRef(R.OpN & (Undef | Index | LoHalf)); in lo() 630 return OpRef(R.OpN & (Undef | Index | HiHalf)); in hi() 642 unsigned OpN = 0; member 657 OpRef(unsigned N) : OpN(N) {} in OpRef() 711 if (OpN & Invalid) { in print() 715 if (OpN & Undef) { in print() 719 if ((OpN & Whole) != Whole) { in print() 720 assert((OpN & Whole) == LoHalf || (OpN & Whole) == HiHalf); in print() 721 if (OpN & LoHalf) in print() [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonBitSimplify.cpp | 178 static bool getUsedBits(unsigned Opc, unsigned OpN, BitVector &Bits, 574 bool HexagonBitSimplify::getUsedBits(unsigned Opc, unsigned OpN, in getUsedBits() argument 580 if (OpN == D.getNumOperands()-1) in getUsedBits() 592 if (OpN == 1) { in getUsedBits() 605 if (OpN == 1) { in getUsedBits() 613 if (OpN == 1) { in getUsedBits() 623 if (OpN == 1) { in getUsedBits() 678 if (OpN == 1 || OpN == 2) { in getUsedBits() 731 if (OpN == 1) { in getUsedBits() 735 if (OpN == 2) { in getUsedBits() [all …]
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D | RDFGraph.cpp | 1211 for (unsigned OpN = 0; OpN < NumOps; ++OpN) { in buildStmt() local 1212 MachineOperand &Op = In.getOperand(OpN); in buildStmt() 1217 if (TOI.isPreserving(In, OpN)) in buildStmt() 1219 if (TOI.isClobbering(In, OpN)) in buildStmt() 1221 if (TOI.isFixedReg(In, OpN)) in buildStmt() 1230 for (unsigned OpN = 0; OpN < NumOps; ++OpN) { in buildStmt() local 1231 MachineOperand &Op = In.getOperand(OpN); in buildStmt() 1240 if (TOI.isPreserving(In, OpN)) in buildStmt() 1242 if (TOI.isClobbering(In, OpN)) in buildStmt() 1244 if (TOI.isFixedReg(In, OpN)) in buildStmt() [all …]
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D | HexagonISelLowering.cpp | 2574 SDValue OpN = Op.getOperand(N); in LowerCONCAT_VECTORS() local 2576 if (VT.getSizeInBits() == 64 && OpN.getValueType().getSizeInBits() == 32) { in LowerCONCAT_VECTORS() 2578 OpN = DAG.getNode(HexagonISD::COMBINE, dl, VT, C, OpN); in LowerCONCAT_VECTORS() 2584 V = DAG.getNode(HexagonISD::INSERTRP, dl, MVT::i32, {V, OpN, Or}); in LowerCONCAT_VECTORS() 2586 V = DAG.getNode(HexagonISD::INSERTRP, dl, MVT::i64, {V, OpN, Or}); in LowerCONCAT_VECTORS()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGSDNodes.cpp | 418 SDNode *OpN = N->getOperand(i).getNode(); in AddSchedEdges() local 419 if (isPassiveNode(OpN)) continue; // Not scheduled. in AddSchedEdges() 420 SUnit *OpSU = &SUnits[OpN->getNodeId()]; in AddSchedEdges() 431 CheckForPhysRegDependency(OpN, N, i, TRI, TII, PhysReg, Cost); in AddSchedEdges() 445 if(isChain && OpN->getOpcode() == ISD::TokenFactor) in AddSchedEdges() 451 ComputeOperandLatency(OpN, N, i, const_cast<SDep &>(dep)); in AddSchedEdges()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
D | ValueMapper.cpp | 669 MDNode &OpN = *cast<MDNode>(Op); in visitOperands() local 670 assert(OpN.isUniqued() && in visitOperands() 672 if (G.Info.insert(std::make_pair(&OpN, Data())).second) in visitOperands() 673 return &OpN; // This is a new one. Return it. in visitOperands()
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/external/llvm/lib/Transforms/Utils/ |
D | ValueMapper.cpp | 656 MDNode &OpN = *cast<MDNode>(Op); in visitOperands() local 657 assert(OpN.isUniqued() && in visitOperands() 659 if (G.Info.insert(std::make_pair(&OpN, Data())).second) in visitOperands() 660 return &OpN; // This is a new one. Return it. in visitOperands()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelDAGToDAG.cpp | 1529 unsigned OpN = M->getNumOperands(); in PreprocessISelDAG() local 1532 assert(OpN < array_lengthof(NewOps)); in PreprocessISelDAG() 1533 for (unsigned Op = 0; Op != OpN; ++Op) { in PreprocessISelDAG() 1544 CurDAG->UpdateNodeOperands(M, makeArrayRef(NewOps, OpN)); in PreprocessISelDAG()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 3567 SDPatternOperator OpN> { 3570 [(set GPR32:$Rd, (OpN FPR16:$Rn))]> { 3577 [(set GPR64:$Rd, (OpN FPR16:$Rn))]> { 3584 [(set GPR32:$Rd, (OpN FPR32:$Rn))]> { 3590 [(set GPR64:$Rd, (OpN FPR32:$Rn))]> { 3596 [(set GPR32:$Rd, (OpN (f64 FPR64:$Rn)))]> { 3602 [(set GPR64:$Rd, (OpN (f64 FPR64:$Rn)))]> { 3608 SDPatternOperator OpN> { 3612 [(set GPR32:$Rd, (OpN (fmul FPR16:$Rn, 3622 [(set GPR64:$Rd, (OpN (fmul FPR16:$Rn, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 3998 SDPatternOperator OpN> { 4001 [(set GPR32:$Rd, (OpN FPR16:$Rn))]> { 4008 [(set GPR64:$Rd, (OpN FPR16:$Rn))]> { 4015 [(set GPR32:$Rd, (OpN FPR32:$Rn))]> { 4021 [(set GPR64:$Rd, (OpN FPR32:$Rn))]> { 4027 [(set GPR32:$Rd, (OpN (f64 FPR64:$Rn)))]> { 4033 [(set GPR64:$Rd, (OpN (f64 FPR64:$Rn)))]> { 4039 SDPatternOperator OpN> { 4043 [(set GPR32:$Rd, (OpN (fmul FPR16:$Rn, 4053 [(set GPR64:$Rd, (OpN (fmul FPR16:$Rn, [all …]
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