| /external/llvm/include/llvm/CodeGen/ |
| D | ScheduleDAGInstrs.h | 50 unsigned OperandIndex; member
53 unsigned OperandIndex, SUnit *SU) in VReg2SUnitOperIdx()
54 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
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| /external/llvm/utils/TableGen/ |
| D | X86DisassemblerTables.cpp | 637 for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS; in emitInstructionInfo() local
638 ++OperandIndex) { in emitInstructionInfo()
640 .operands[OperandIndex].encoding; in emitInstructionInfo()
642 .operands[OperandIndex].type; in emitInstructionInfo()
670 for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS; in emitInstructionInfo() local
671 ++OperandIndex) { in emitInstructionInfo()
673 .operands[OperandIndex].encoding; in emitInstructionInfo()
675 .operands[OperandIndex].type; in emitInstructionInfo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ScheduleDAGInstrs.h | 67 unsigned OperandIndex; member
70 unsigned OperandIndex, SUnit *SU) in VReg2SUnitOperIdx()
71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
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| /external/llvm/lib/Target/Sparc/ |
| D | LeonPasses.cpp | 30 int OperandIndex) { in GetRegIndexForOperand() argument
32 if (OperandIndex == LAST_OPERAND) { in GetRegIndexForOperand()
33 OperandIndex = MI.getNumOperands() - 1; in GetRegIndexForOperand()
36 if (MI.getNumOperands() > (unsigned)OperandIndex && in GetRegIndexForOperand()
37 MI.getOperand(OperandIndex).isReg()) { in GetRegIndexForOperand()
38 return (int)MI.getOperand(OperandIndex).getReg(); in GetRegIndexForOperand()
463 for (unsigned OperandIndex = 0; OperandIndex < NumOperands; in runOnMachineFunction() local
464 OperandIndex++) { in runOnMachineFunction()
465 MachineOperand &MO = MI.getOperand(OperandIndex); in runOnMachineFunction()
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| D | LeonPasses.h | 38 int GetRegIndexForOperand(MachineInstr &MI, int OperandIndex);
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | X86DisassemblerTables.cpp | 838 for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS; in emitInstructionInfo() local
839 ++OperandIndex) { in emitInstructionInfo()
841 .operands[OperandIndex].encoding; in emitInstructionInfo()
843 .operands[OperandIndex].type; in emitInstructionInfo()
871 for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS; in emitInstructionInfo() local
872 ++OperandIndex) { in emitInstructionInfo()
874 .operands[OperandIndex].encoding; in emitInstructionInfo()
876 .operands[OperandIndex].type; in emitInstructionInfo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | LeonPasses.h | 37 int GetRegIndexForOperand(MachineInstr &MI, int OperandIndex);
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/MCParser/ |
| D | MCTargetAsmParser.h | 230 unsigned OperandIndex) { in getMissedOperand() argument
236 Result.MissedOperand.Index = OperandIndex; in getMissedOperand()
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| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86InstComments.cpp | 175 unsigned OperandIndex) { in getRegOperandVectorVT() argument
176 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); in getRegOperandVectorVT()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/ |
| D | X86InstComments.cpp | 217 unsigned OperandIndex) { in getRegOperandNumElts() argument
218 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); in getRegOperandNumElts()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | ScheduleDAGInstrs.cpp | 412 I->OperandIndex)); in addVRegDefDeps()
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| /external/clang/lib/CodeGen/ |
| D | TargetInfo.cpp | 1051 unsigned OperandIndex; in rewriteInputConstraintReferences() local
1052 if (!OperandStr.getAsInteger(10, OperandIndex)) { in rewriteInputConstraintReferences()
1053 if (OperandIndex >= FirstIn) in rewriteInputConstraintReferences()
1054 OperandIndex += NumNewOuts; in rewriteInputConstraintReferences()
1055 OS << OperandIndex; in rewriteInputConstraintReferences()
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| /external/llvm/lib/CodeGen/ |
| D | ScheduleDAGInstrs.cpp | 463 I->OperandIndex)); in addVRegDefDeps()
|