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Searched refs:OutR (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagonGenPredicate.cpp396 Register OutR(Op0); in convertToPredForm() local
415 const TargetRegisterClass *RC = MRI->getRegClass(OutR.R); in convertToPredForm()
419 MRI->replaceRegWith(OutR.R, NewOutR); in convertToPredForm()
DHexagonBitSimplify.cpp2340 bool isShuffleOf(unsigned OutR, unsigned InpR) const;
2438 bool HexagonLoopRescheduling::isShuffleOf(unsigned OutR, unsigned InpR) const { in isShuffleOf() argument
2439 if (!BTP->has(OutR) || !BTP->has(InpR)) in isShuffleOf()
2441 const BitTracker::RegisterCell &OutC = BTP->lookup(OutR); in isShuffleOf()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonGenPredicate.cpp414 Register OutR(Op0); in convertToPredForm() local
433 const TargetRegisterClass *RC = MRI->getRegClass(OutR.R); in convertToPredForm()
437 MRI->replaceRegWith(OutR.R, NewOutR); in convertToPredForm()
DHexagonBitSimplify.cpp2923 bool isShuffleOf(unsigned OutR, unsigned InpR) const;
3016 bool HexagonLoopRescheduling::isShuffleOf(unsigned OutR, unsigned InpR) const { in isShuffleOf() argument
3017 if (!BTP->has(OutR) || !BTP->has(InpR)) in isShuffleOf()
3019 const BitTracker::RegisterCell &OutC = BTP->lookup(OutR); in isShuffleOf()