Searched refs:PDIV (Results 1 – 4 of 4) sorted by relevance
/external/u-boot/board/samsung/smdkc100/ |
D | lowlevel_init.S | 91 ldr r1, =0x81bc0400 @ SDIV 0, PDIV 4, MDIV 444 (1332MHz) 94 ldr r1, =0x80590201 @ SDIV 1, PDIV 2, MDIV 89 (267MHz) 97 ldr r1, =0x80870303 @ SDIV 3, PDIV 3, MDIV 135 (67.5MHz)
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/external/u-boot/board/samsung/odroid/ |
D | odroid.c | 119 clr_pll_con0 = SDIV(7) | PDIV(63) | MDIV(1023) | FSEL(1); in board_clock_init() 120 set = SDIV(0) | PDIV(3) | MDIV(125) | FSEL(1); in board_clock_init() 203 set = SDIV(0) | PDIV(3) | MDIV(100) | FSEL(0) | PLL_ENABLE(1); in board_clock_init()
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D | setup.h | 12 #define PDIV(x) (((x) & 0x3f) << 8) macro
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/external/u-boot/board/samsung/goni/ |
D | lowlevel_init.S | 257 ldr r1, =0x81bc0400 @ SDIV 0, PDIV 4, MDIV 444 (1333MHz) 260 ldr r1, =0x80590201 @ SDIV 1, PDIV 2, MDIV 89 (267MHz) 263 ldr r1, =0x80870303 @ SDIV 3, PDIV 3, MDIV 135 (67.5MHz) 266 ldr r1, =0x80600603 @ SDIV 3, PDIV 6, MDIV 96
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