Searched refs:PHY_CON12_RESET_VAL (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/arch/arm/mach-exynos/ | ||
| D | exynos5_setup.h | 280 #define PHY_CON12_RESET_VAL 0x10100070 macro |
| D | dmc_init_ddr3.c | 786 val = PHY_CON12_RESET_VAL; in ddr3_mem_ctrl_init() |