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Searched refs:PINMUX_CFG_REG (Results 1 – 13 of 13) sorted by relevance

/external/u-boot/drivers/pinctrl/renesas/
Dpfc-r8a77995.c2018 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) {
2052 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) {
2086 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) {
2120 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) {
2154 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) {
2188 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) {
2222 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) {
2261 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) {
2271 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) {
2281 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) {
[all …]
Dpfc-r8a77970.c2050 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) {
2084 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) {
2118 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) {
2152 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) {
2186 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) {
2220 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) {
2259 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) {
2269 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) {
2279 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) {
2289 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4) {
[all …]
Dpfc-r8a7792.c1993 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
2027 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
2061 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
2095 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
2129 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
2163 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
2197 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
2231 { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1) {
2265 { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1) {
2299 { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1) {
[all …]
Dpfc-r8a77990.c4688 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) {
4722 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) {
4756 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) {
4790 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) {
4824 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) {
4858 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) {
4892 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) {
4931 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) {
4941 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) {
4951 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) {
[all …]
Dpfc-r8a7796.c5022 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) {
5056 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) {
5090 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) {
5124 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) {
5158 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) {
5192 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) {
5226 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) {
5260 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1) {
5299 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) {
5309 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) {
[all …]
Dpfc-r8a7795.c5078 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) {
5112 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) {
5146 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) {
5180 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) {
5214 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) {
5248 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) {
5282 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) {
5316 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1) {
5355 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) {
5365 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) {
[all …]
Dpfc-r8a7791.c5438 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
5472 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
5506 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
5540 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
5574 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
5608 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
5642 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
5676 { PINMUX_CFG_REG("GPSR7", 0xE6060074, 32, 1) {
Dpfc-r8a7794.c4622 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
4656 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
4690 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
4724 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
4758 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
4792 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
4826 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
Dpfc-r8a7790.c4748 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
4782 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
4816 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
4850 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
4884 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
4918 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
Dsh_pfc.h113 #define PINMUX_CFG_REG(name, r, r_width, f_width) \ macro
/external/u-boot/include/
Dsh_pfc.h51 #define PINMUX_CFG_REG(name, r, r_width, f_width) \ macro
186 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
/external/u-boot/arch/arm/mach-rmobile/
Dpfc-r8a7740.c2341 { PINMUX_CFG_REG("MSEL1CR", 0xe605800c, 32, 1) {
2368 { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
2381 { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
2400 { PINMUX_CFG_REG("MSEL5CR", 0xE6058028, 32, 1) {
Dpfc-sh73a0.c2523 { PINMUX_CFG_REG("MSEL2CR", 0xe605801c, 32, 1) {
2558 { PINMUX_CFG_REG("MSEL3CR", 0xe6058020, 32, 1) {
2593 { PINMUX_CFG_REG("MSEL4CR", 0xe6058024, 32, 1) {