Searched refs:PIPE_SHADER_CAP_MAX_INPUTS (Results 1 – 21 of 21) sorted by relevance
100 case PIPE_SHADER_CAP_MAX_INPUTS: in gallivm_get_shader_param()
491 case PIPE_SHADER_CAP_MAX_INPUTS: in vgpu9_get_shader_param()563 case PIPE_SHADER_CAP_MAX_INPUTS: in vgpu9_get_shader_param()660 case PIPE_SHADER_CAP_MAX_INPUTS: in vgpu10_get_shader_param()
78 PIPE_SHADER_CAP_MAX_INPUTS) < 16 || in NineAdapter9_ctor()80 PIPE_SHADER_CAP_MAX_INPUTS) < 10) { in NineAdapter9_ctor()93 … PIPE_SHADER_CAP_MAX_INPUTS) < 20) /* we don't pack inputs as much as we could */ in NineAdapter9_ctor()817 PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_MAX_INPUTS), in NineAdapter9_GetDeviceCaps()
331 case PIPE_SHADER_CAP_MAX_INPUTS: in r300_get_shader_param()401 case PIPE_SHADER_CAP_MAX_INPUTS: in r300_get_shader_param()
295 case PIPE_SHADER_CAP_MAX_INPUTS: in nv30_screen_get_shader_param()347 case PIPE_SHADER_CAP_MAX_INPUTS: in nv30_screen_get_shader_param()
656 PIPE_SHADER_CAP_MAX_INPUTS, enumerator
502 case PIPE_SHADER_CAP_MAX_INPUTS: in tgsi_exec_get_shader_param()
139 case PIPE_SHADER_CAP_MAX_INPUTS: in i915_get_shader_param()
219 screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_INPUTS); in st_init_limits()230 screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_INPUTS) * 4; in st_init_limits()356 PIPE_SHADER_CAP_MAX_INPUTS); in st_init_limits()
848 PIPE_SHADER_CAP_MAX_INPUTS, enumerator
365 case PIPE_SHADER_CAP_MAX_INPUTS: in vc5_screen_get_shader_param()
407 case PIPE_SHADER_CAP_MAX_INPUTS: in vc4_screen_get_shader_param()
310 case PIPE_SHADER_CAP_MAX_INPUTS: in virgl_get_shader_param()
521 case PIPE_SHADER_CAP_MAX_INPUTS: in fd_screen_get_shader_param()
429 case PIPE_SHADER_CAP_MAX_INPUTS: in si_get_shader_param()
409 case PIPE_SHADER_CAP_MAX_INPUTS: in etna_screen_get_shader_param()
558 case PIPE_SHADER_CAP_MAX_INPUTS: in r600_get_shader_param()
328 case PIPE_SHADER_CAP_MAX_INPUTS: in nv50_screen_get_shader_param()
375 PIPE_SHADER_CAP_MAX_INPUTS); in u_vbuf_destroy()
365 case PIPE_SHADER_CAP_MAX_INPUTS: in nvc0_screen_get_shader_param()
451 * ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers.